Davide Zoni
Scholar

Davide Zoni

Google Scholar ID: cbHoEcMAAAAJ
Politecnico di Milano
Computer ArchitectureMicroarchitectureLow-powerHardware security
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Citations & Impact
All-time
Citations
683
 
H-index
15
 
i10-index
29
 
Publications
20
 
Co-authors
13
list available
Contact
No contact links provided.
Publications
8 items
OSIRIS: Bridging Analog Circuit Design and Machine Learning with Scalable Dataset Generation
2026
Cited
0
Rhea: a Framework for Fast Design and Validation of RTL Cache-Coherent Memory Subsystems
2025
Cited
0
A Benchmarking Platform for DDR4 Memory Performance in Data-Center-Class FPGAs
2025
Cited
0
A Prototype-Based Framework to Design Scalable Heterogeneous SoCs with Fine-Grained DFS
ICCD · 2024
Cited
0
Hound: Locating Cryptographic Primitives in Desynchronized Side-Channel Traces using Deep-Learning
ICCD · 2024
Cited
1
Blink: Fast Automated Design of Run-Time Power Monitors on FPGA-Based Computing Platforms
International Conference on Electronics, Circuits, and Systems · 2024
Cited
0
Functional ISS-Driven Verification of Superscalar RISC-V Processors
International Conference on Electronics, Circuits, and Systems · 2024
Cited
0
An FPGA-Based Open-Source Hardware-Software Framework for Side-Channel Security Research
arXiv.org · 2024
Cited
0
Resume (English only)
Co-authors
13 total
Co-author 1
Co-author 1
Giovanni Agosta
Giovanni Agosta
Politecnico di Milano, Italy
Alessandro Cilardo
Alessandro Cilardo
U. of Naples Federico II-For full details, please refer to http://wpage.unina.it/acilardo
Co-author 4
Co-author 4
Co-author 5
Co-author 5
Co-author 6
Co-author 6
David Atienza
David Atienza
Professor of Electrical and Computer Engineering, EPFL
Co-author 8
Co-author 8