Scholar
Huawei Li
Google Scholar ID: -nRJJYEAAAAJ
Institute of Computing Technology, Chinese Academy of Sciences
Citations & Impact
Citations
2,886
H-index
27
i10-index
84
Publications
20
Co-authors
48
list available
Contact
No contact links provided.
Publications
Resume (English only)
Academic Achievements
- Authored the monograph "Digital Integrated Circuit Testing: Theory, Methods and Practice" (Tsinghua University Press, June 2024)
- Published numerous papers in top-tier journals such as IEEE TCAD and IEEE TC, covering topics like fault protection in RRAM-based neural networks, GNN accelerators, and Trojan detection in instruction sets
- Paper “EnGN: A High-Throughput and Energy-Efficient Accelerator for Large Graph Neural Networks” received the IEEE TC Best Paper Award (2021)
- Serves as Associate Editor for multiple international journals including IEEE Transactions on VLSI Systems, IEEE Design & Test, and Journal of Computer Science & Technology
- Has held leadership roles in major conferences, including Program Co-Chair of IEEE ATS’18 and ITC-Asia’18, and Chair of Steering Committees
- Currently Chair of the CCF Special Committee on IC Design (2024–2027)
Research Experience
- Jun 2022 – Present: Deputy Director, National Key Laboratory of Processor Chips, Institute of Computing Technology, CAS; Researcher
- Oct 2008 – May 2022: Deputy Director (2020–2022) and Researcher, State Key Laboratory of Computer Architecture, ICT, CAS
- Aug 2009 – Aug 2010: Visiting Professor, Department of Electrical and Computer Engineering, UC Santa Barbara, USA
- Oct 2001 – Sep 2008: Associate Researcher, Network Division / Key Laboratory of Computer System Architecture, CAS
- Jul 2001 – Sep 2001: Assistant Researcher, Network Division, ICT, CAS
