🤖 AI Summary
This work addresses the challenge of root cause localization in sequential hardware designs, where conventional spectral analysis methods often fail due to timing misalignment and state contamination. To overcome these limitations, the authors propose a causal chain reconstruction framework that leverages a time-reversal mechanism—based on an estimated minimum propagation period—to identify potentially activating cycles. Combined with a trace-pruning strategy to mitigate state contamination, the approach effectively handles the temporal complexities inherent in sequential circuits. Specifically optimized for sequential logic, the method achieves Top-1, Top-3, and Top-5 hit rates of 51%, 80%, and 85%, respectively, on comprehensive benchmark suites, significantly outperforming existing techniques while maintaining robust performance even in complex designs.
📝 Abstract
Debugging represents a time-consuming and labor-intensive task in hardware design, with bug localization constituting a substantial portion of this process. While spectrum-based bug localization techniques have achieved remarkable success in software domains and shown promise for hardware description languages, their effectiveness severely degrades in sequential designs. Unlike software programs, hardware designs exhibit intrinsic temporal characteristics that create fundamental challenges: timing misalignment between bug activation and observation, and progressive error propagation through state elements that obscures the root cause. To address these limitations, we propose Pecker, a novel bug localization framework that reconstructs the broken causal chain in sequential designs. Our approach introduces two key innovations: temporal backtracking using Estimated Minimal Propagation Cycles to identify potential activation cycles, strategic trace pruning to eliminate state pollution effects. We evaluate Pecker on comprehensive benchmarks comprising both combinational and sequential circuits. Experimental results demonstrate that Pecker effectively localizes 51%/80%/85% bugs within Top-1/3/5 ranks respectively, significantly outperforming state-of-the-art techniques. Notably, Pecker maintains robust performance across circuit complexities while existing methods exhibit severe degradation on sequential designs.