An In-Situ Spatial-Temporal Sequence Detector for Neuromorphic Vision Sensor Empowered by High Density Vertical NAND Storage
🤖 AI Summary
To address the challenges of real-time, low-power pattern recognition for neuromorphic vision sensors, this work proposes an in-situ spatiotemporal sequence detector built upon vertical NAND (vNAND) memory. The method maps pixel-level temporal sequences onto wordlines and employs individual NAND strings as independent pixel templates, enabling massively parallel template matching. It pioneers the hardware reconfiguration of a 3D vNAND array into a spatiotemporal pattern detector, integrating FeFET-based multilevel storage, wordline-based temporal encoding, bitline direct sensing, and single-transistor multilevel-cell (MLC) architecture. Experimental validation is performed at both device and array levels. Compared to a general-purpose CPU implementation, the design achieves over 10⁶× higher energy efficiency and more than 1000× lower latency. The core contribution lies in breaking the conventional memory–compute separation paradigm, delivering the first hardware-native support for spatiotemporal pattern recognition within a vertical NAND architecture.
Application Category
📝 Abstract
Neuromorphic vision sensors require efficient real-time pattern recognition, yet conventional architectures struggle with energy and latency constraints. Here, we present a novel in-situ spatiotemporal sequence detector that leverages vertical NAND storage to achieve massively parallel pattern detection. By encoding each cell with two single-transistor-based multi-level cell (MLC) memory elements, such as ferroelectric field-effect transistors (FeFETs), and mapping a pixel's temporal sequence onto consecutive word lines (WLs), we enable direct temporal pattern detection within NAND strings. Each NAND string serves as a dedicated reference for a single pixel, while different blocks store patterns for distinct pixels, allowing large-scale spatial-temporal pattern recognition via simple direct bit-line (BL) sensing, a well-established operation in vertical NAND storage. We experimentally validate our approach at both the cell and array levels, demonstrating that vertical NAND-based detector achieves more than six orders of magnitude improvement in energy efficiency and more than three orders of magnitude reduction in latency compared to conventional CPU-based methods. These findings establish vertical NAND storage as a scalable and energy-efficient solution for next-generation neuromorphic vision processing.
Problem
Research questions and friction points this paper is trying to address.
Efficient real-time pattern recognition for neuromorphic vision sensors
Overcoming energy and latency constraints in conventional architectures
Scalable spatiotemporal pattern detection using vertical NAND storage
Innovation
Methods, ideas, or system contributions that make the work stand out.
Uses vertical NAND for parallel pattern detection
Encodes cells with FeFET-based MLC memory
Enables direct temporal pattern in NAND strings
