Scholar
Dipayan Saha
Google Scholar ID: SGJ0kqgAAAAJ
University of Florida
Hardware Security
Side-Channel Analysis
LLM for Hardware Security
GenAI for Security Verification
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Citations & Impact
All-time
Citations
295
H-index
8
i10-index
7
Publications
20
Co-authors
4
list available
Contact
No contact links provided.
Publications
5 items
Assertain: Automated Security Assertion Generation Using Large Language Models
2026
Cited
0
LAsset: An LLM-assisted Security Asset Identification Framework for System-on-Chip (SoC) Verification
arXiv.org · 2026
Cited
0
SV-LLM: An Agentic Approach for SoC Security Verification using Large Language Models
2025
Cited
0
BugWhisperer: Fine-Tuning LLMs for SoC Hardware Vulnerability Detection
IACR Cryptology ePrint Archive · 2025
Cited
1
ThreatLens: LLM-guided Threat Modeling and Test Plan Generation for Hardware Security Verification
IACR Cryptology ePrint Archive · 2025
Cited
0
Resume (English only)
Co-authors
4 total
Farimah Farahmandi
Assistant Professor, University of Florida
Mark M. Tehranipoor
Intel Charles E. Young Endowed Chair Professor, ECE, University of Florida
Shams Tarek
PhD Candidate, Department of ECE, University of Florida
Co-author 4
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