SV-LLM: An Agentic Approach for SoC Security Verification using Large Language Models

2025-06-25

AI Summary

To address the limitations of conventional SoC security verification—namely, insufficient automation, scalability, and adaptability—this paper proposes the first multi-agent large language model (LLM) framework specifically designed for hardware security verification. The framework employs a role-based division of labor, integrating dynamic task orchestration with a hybrid learning paradigm comprising in-context learning, fine-tuning, and retrieval-augmented generation (RAG). It collaboratively executes end-to-end tasks including security requirement analysis, threat modeling, test case generation, and vulnerability validation. By unifying natural language understanding, code synthesis, and formal logic reasoning capabilities, the framework substantially reduces manual effort. Evaluated across multiple industrial SoC case studies, it demonstrates improved vulnerability detection rates, shortened verification cycles, and strong scalability—thereby advancing hardware security verification toward intelligent, automated, and adaptive paradigms.

Technology Category

• Machine Learning: Hardware-aware ML
• Cognitive Modeling & Cognitive Systems: Agent Architectures
• Natural Language Processing: Safety and Robustness

Application Category

• Security and Privacy: Large-scale security measurements
• Systems and Infrastructure for Web, Mobile and WoT: Applied ML and AI for Web-based mobile applications
• Semantics and Knowledge: Data modeling to support human-machine intelligence, including LLMs agents, intelligent system behavior, explanations, and user-friendly interactions

Abstract

Ensuring the security of complex system-on-chips (SoCs) designs is a critical imperative, yet traditional verification techniques struggle to keep pace due to significant challenges in automation, scalability, comprehensiveness, and adaptability. The advent of large language models (LLMs), with their remarkable capabilities in natural language understanding, code generation, and advanced reasoning, presents a new paradigm for tackling these issues. Moving beyond monolithic models, an agentic approach allows for the creation of multi-agent systems where specialized LLMs collaborate to solve complex problems more effectively. Recognizing this opportunity, we introduce SV-LLM, a novel multi-agent assistant system designed to automate and enhance SoC security verification. By integrating specialized agents for tasks like verification question answering, security asset identification, threat modeling, test plan and property generation, vulnerability detection, and simulation-based bug validation, SV-LLM streamlines the workflow. To optimize their performance in these diverse tasks, agents leverage different learning paradigms, such as in-context learning, fine-tuning, and retrieval-augmented generation (RAG). The system aims to reduce manual intervention, improve accuracy, and accelerate security analysis, supporting proactive identification and mitigation of risks early in the design cycle. We demonstrate its potential to transform hardware security practices through illustrative case studies and experiments that showcase its applicability and efficacy.

Problem

• Automating SoC security verification with multi-agent LLMs
• Overcoming scalability and adaptability in traditional verification
• Enhancing accuracy and speed in hardware security analysis

Innovation

• Multi-agent LLM system for SoC verification
• Specialized agents for diverse security tasks
• Combines in-context learning fine-tuning RAG