Scholar
Sitao Huang
Google Scholar ID: KduOKeMAAAAJ
Assistant Professor of EECS, University of California Irvine
Hardware Acceleration
High-Level Synthesis
FPGA
Parallel Computing
GPU
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Citations & Impact
All-time
Citations
1,126
H-index
17
i10-index
22
Publications
20
Co-authors
18
list available
Contact
Email
webmaster@sitaohuang.com
Publications
13 items
PD-Swap: Prefill-Decode Logic Swapping for End-to-End LLM Inference on Edge FPGAs via Dynamic Partial Reconfiguration
2025
Cited
0
TeLLMe v2: An Efficient End-to-End Ternary LLM Prefill and Decode Accelerator with Table-Lookup Matmul on Edge FPGAs
2025
Cited
0
Rethinking RoPE Scaling in Quantized LLM: Theory, Outlier, and Channel-Band Analysis with Weight Rescaling
2025
Cited
0
Q-ROAR: Outlier-Aware Rescaling for RoPE Position Interpolation in Quantized Long-Context LLMs
2025
Cited
0
DPad: Efficient Diffusion Language Models with Suffix Dropout
2025
Cited
0
A Sparsity-Aware Autonomous Path Planning Accelerator with HW/SW Co-Design and Multi-Level Dataflow Optimization
2025
Cited
0
Characterizing State Space Model (SSM) and SSM-Transformer Hybrid Language Model Performance with Long Context Length
2025
Cited
0
Fault-Free Analog Computing with Imperfect Hardware
2025
Cited
0
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Resume (English only)
Co-authors
18 total
Wen-mei W. Hwu
Senior Distinguished Research Scientist, NVIDIA; Professor and Sanders-AMD Chair of Electrical and
Deming Chen
Abel Bliss Professor. University of Illinois at Urbana-Champaign
Jinjun Xiong
University at Buffalo
Kun Wu
University of Illinois at Urbana-Champaign
Co-author 5
Mert Hidayetoğlu
Postdoctoral Scholar, Stanford University
Cong (Callie) Hao
Georgia Institute of Technology
Izzat El Hajj
American University of Beirut
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