SATA: Sparsity-Aware Scheduling for Selective Token Attention
This work addresses the hardware inefficiency of Transformer attention mechanisms stemming from their quadratic complexity, particularly exacerbated by sparse and irregular selective token attention patterns that incur substantial memory access overhead. To mitigate this, the authors propose a data locality–centric dynamic scheduling mechanism that, for the first time, integrates sparse access patterns with a runtime trace-driven control-compute co-design architecture. By reordering operand streams and employing prefetching and release strategies for intermediate Query/Key vectors, the approach efficiently manages irregular data flows with minimal scheduling overhead. Experimental results demonstrate that the proposed method achieves up to 1.76× higher system throughput and improves energy efficiency by up to 2.94× compared to existing solutions.