Scholar
Maurizio Martina
Google Scholar ID: mtYbZOUAAAAJ
Dipartimento di Elettronica e Telecomunicazioni, Politecnico di Torino
VLSI design
channel decoder architectures
image and video compression
digital signal processing
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Citations & Impact
All-time
Citations
2,350
H-index
23
i10-index
54
Publications
20
Co-authors
0
Contact
No contact links provided.
Publications
5 items
Just TestIt! An SBST Approach To Automate System-Integration Testing
2025
Cited
0
ARCANE: Adaptive RISC-V Cache Architecture for Near-memory Extensions
2025
Cited
0
Scalable and RISC-V Programmable Near-Memory Computing Architectures for Edge Nodes
arXiv.org · 2024
Cited
1
TinyCL: An Efficient Hardware Architecture for Continual Learning on Autonomous Systems
arXiv.org · 2024
Cited
0
A Homomorphic Encryption Framework for Privacy-Preserving Spiking Neural Networks
Inf. · 2023
Cited
3
Resume (English only)
Co-authors
0 total
Co-authors: 0 (list not available)
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