Pasquale Davide Schiavone
Scholar

Pasquale Davide Schiavone

Google Scholar ID: mfZQ9zUAAAAJ
EPFL, OpenHW Group
Microprocessor designInternet-of-ThingsMachine LearningArithmetic Circuits
Google Scholar↗
Citations & Impact
All-time
Citations
1,704
 
H-index
14
 
i10-index
18
 
Publications
20
 
Co-authors
10
list available
Contact
No contact links provided.
Publications
7 items
X-HEEP: An Open-Source, Configurable and Extendible RISC-V Platform for TinyAI Applications
2025
Cited
0
e-GPU: An Open-Source and Configurable RISC-V Graphic Processing Unit for TinyAI Applications
2025
Cited
0
Just TestIt! An SBST Approach To Automate System-Integration Testing
2025
Cited
0
Quadrilatero: A RISC-V programmable matrix coprocessor for low-power edge applications
2025
Cited
0
ARCANE: Adaptive RISC-V Cache Architecture for Near-memory Extensions
2025
Cited
0
Increasing the Energy-Efficiency of Wearables Using Low-Precision Posit Arithmetic with PHEE
2025
Cited
0
Scalable and RISC-V Programmable Near-Memory Computing Architectures for Edge Nodes
arXiv.org · 2024
Cited
1
Resume (English only)
Co-authors
10 total
Luca Benini
Luca Benini
ETH Zürich, Università di Bologna
Davide Rossi
Davide Rossi
Associate Professor, University Of Bologna
Francesco Conti
Francesco Conti
Associate Professor, University of Bologna
Co-author 4
Co-author 4
Co-author 5
Co-author 5
David Atienza
David Atienza
Professor of Electrical and Computer Engineering, EPFL
Frank K. Gürkaynak
Frank K. Gürkaynak
Senior Scientist, ETH Zurich
Co-author 8
Co-author 8