Published numerous research findings on security attacks and defenses, including those for the nascent Cloud FPGA computing paradigm and DRAM-based Physically Uncloneable Functions (PUFs). Has received multiple NSF grants, as well as support from SRC, TII, Xilinx, Intel (formerly Altera), and Amazon (AWS). Collaborates with companies such as Quantinuum and SandboxAQ.
Research Experience
Leads the Computer Architecture and Security Laboratory (CASLAB). Prior to joining Northwestern University, he was a faculty member in the (then) Electrical Engineering department at Yale University. Research areas include power side-channel vulnerabilities in quantum computer controllers, attacks on reset gates, secure TLBs, security verification frameworks for processor caches and whole architectures, and hardware accelerators for post-quantum cryptographic algorithms.
Education
B.S. in Electrical and Computer Engineering from the University of Illinois Urbana-Champaign (with highest honors); M.A. and Ph.D. in (then) Electrical Engineering from Princeton University.
Background
Research interests include computer security, with a special focus on architectures and hardware for securing computer systems, from traditional CPUs, GPUs, and FPGAs to emerging quantum computing systems. Received the 2021 Ackerman Award for Teaching and Mentoring.
Miscellany
Available for cybersecurity consulting work with companies and other organizations.