Junyi Liu
Scholar

Junyi Liu

Google Scholar ID: KZWPR4sAAAAJ
Microsoft Research
Hardware accelerationDistributed SystemsHigh-level synthesisFPGA
Citations & Impact
All-time
Citations
292
 
H-index
9
 
i10-index
9
 
Publications
16
 
Co-authors
41
list available
Resume (English only)
Academic Achievements
  • No specific academic achievements mentioned.
Research Experience
  • Principal Researcher at Microsoft Research Cambridge, with research areas including data platforms and analytics, hardware and devices, and systems and networking.
Education
  • PhD from Imperial College London, focusing on high-level synthesis for reconfigurable computing.
Background
  • I am a principal researcher at Microsoft Research Cambridge in the Future AI Infrastructure group. My current work is on ML-system co-design for LLM inference. We design innovative memory systems that exploit model sparsity, and they will guide future scaling of memory hardware. More recently, I am also working on microLED-based optical interconnects and their system design. Before that, I have been working on LLMs for digital hardware design, and FPGA-based hardware acceleration for cloud and AI infrastructure.
Miscellany
  • No specific personal interests or hobbies mentioned.