Avinash Malik
Scholar

Avinash Malik

Google Scholar ID: F1MIfXwAAAAJ
University of Auckland
Formal logicprogramming languagesprocessor designformal verificationcompiler optimizations
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Citations & Impact
All-time
Citations
420
 
H-index
11
 
i10-index
13
 
Publications
20
 
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0
 
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Publications
4 items
Synchronous Signal Temporal Logic for Decidable Verification of Cyber-Physical Systems
2026
Cited
0
Efficient compilation and execution of synchronous programs via type-state programming
2025
Cited
0
Timetide: A programming model for logically synchronous distributed systems
2025
Cited
0
Frequency Automata: A novel formal model of hybrid systems in combined time and frequency domains
2025
Cited
0
Resume (English only)
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Co-authors: 0 (list not available)