Scholar
Jianwang Zhai
Google Scholar ID: AygeGOcAAAAJ
Beijing University of Posts and Telecommunications
Citations & Impact
Citations
249
H-index
9
i10-index
8
Publications
20
Co-authors
17
list available
Contact
No contact links provided.
Publications
Resume (English only)
Academic Achievements
- Corresponding author of 'ORL-LO: Offline RL for Pre-training and Fine-tuning in Logic Optimization', accepted by ACM Transactions on Design Automation of Electronic Systems (TODAES)
- Corresponding author of 'DrlGoFPGA: FPGA Global Placement Considering Input-Output Buffer Based on Deep Reinforcement Learning and Gradient Optimization', accepted by IEEE TCAS-I
- Best Oral Presentation Award at ICICM 2025 for 'GraphRL-Core: Intelligent Logic Synthesis Optimization via Graph Transformer and Deep Reinforcement Learning'
- Best Paper Award Nomination at GLSVLSI 2025 for 'MILS: Modality Interaction Driven Learning for Logic Synthesis'
- Multiple papers accepted at top-tier conferences/journals including DAC, ICCAD, ASP-DAC, and GLSVLSI, with frequent role as corresponding author
