Scholar
Gururaj Saileshwar
Google Scholar ID: 0RnpQFcAAAAJ
University of Toronto
Hardware Security
Computer Architecture
Memory Systems
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Citations & Impact
All-time
Citations
1,198
H-index
17
i10-index
21
Publications
20
Co-authors
51
list available
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No contact links provided.
Publications
9 items
CLIP: Client-Side Invariant Pruning for Mitigating Stragglers in Secure Federated Learning
2025
Cited
0
Yet Another Mirage of Breaking MIRAGE: Debunking Occupancy-based Side-Channel Attacks on Fully Associative Randomized Caches
2025
Cited
0
GPUHammer: Rowhammer Attacks on GPU Memories are Practical
2025
Cited
0
CnC-PRAC: Coalesce, not Cache, Per Row Activation Counts for an Efficient in-DRAM Rowhammer Mitigation
2025
Cited
0
When Mitigations Backfire: Timing Channel Attacks and Defense for PRAC-Based RowHammer Mitigations
2025
Cited
0
AMuLeT: Automated Design-Time Testing of Secure Speculation Countermeasures
2025
Cited
0
QPRAC: Towards Secure and Practical PRAC-based Rowhammer Mitigation using Priority Queues
2025
Cited
0
Teaching an Old Dog New Tricks: Verifiable FHE Using Commodity Hardware
arXiv.org · 2024
Cited
0
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Resume (English only)
Co-authors
51 total
Moinuddin Qureshi
Professor, Georgia Institute of Technology
Prashant Nair
University of British Columbia
Co-author 3
Co-author 4
Jeonghyun Woo
The University of British Columbia
Co-author 6
Aamer Jaleel
IEEE Fellow; Principal Research Scientist at NVIDIA Research
Co-author 8
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