Quantum Circuit Synthesis and Compilation Optimization: Overview and Prospects

📅 2024-06-30
🏛️ arXiv.org
📈 Citations: 29
Influential: 2
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🤖 AI Summary
To address the high manual design overhead and low execution fidelity/efficiency in mapping quantum algorithms to hardware, this paper proposes a cross-layer (algorithm–compiler–hardware) co-optimization framework. Methodologically, it pioneers the integration of deep reinforcement learning with graph neural networks to jointly automate quantum architecture search, logic synthesis, gate-level optimization, qubit mapping, and SWAP-based routing; it further introduces a superconducting-qubit hardware-adaptive modeling mechanism. Key contributions include: (1) establishing an AI-driven, end-to-end compilation optimization paradigm; (2) significantly reducing human intervention while improving circuit depth compression and quantum gate fidelity; and (3) empirically validating the feasibility and superior performance of the AI-enhanced compiler on medium-scale real superconducting quantum processors.

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📝 Abstract
Quantum computing is regarded as a promising paradigm that may overcome the current computational power bottlenecks in the post-Moore era. The increasing maturity of quantum processors, especially superconducting ones, provides more possibilities for the development and implementation of quantum algorithms. As the crucial stages for quantum algorithm implementation, the logic circuit design and quantum compiling have also received significant attention, which covers key technologies such as quantum logic circuit synthesis (also widely known as quantum architecture search) and optimization, as well as qubit mapping and routing. Recent studies suggest that the scale and precision of related algorithms are steadily increasing, especially with the integration of artificial intelligence methods. In this survey, we systematically review and summarize a vast body of literature, exploring the feasibility of an integrated design and optimization scheme that spans from the algorithmic level to quantum hardware, combining the steps of logic circuit design and compilation optimization. Leveraging the exceptional cognitive and learning capabilities of AI algorithms, one can reduce manual design costs, enhance the precision and efficiency of execution, and facilitate the implementation and validation of the superiority of quantum algorithms on hardware.
Problem

Research questions and friction points this paper is trying to address.

Optimizing quantum circuit synthesis and compilation processes
Reducing manual design costs through AI integration
Enhancing quantum algorithm execution precision and efficiency
Innovation

Methods, ideas, or system contributions that make the work stand out.

AI-enhanced quantum circuit synthesis and compilation optimization
Integrated design from algorithm to quantum hardware
Automated optimization reducing manual design costs
Y
Yan Ge
Department of Computer Science and Engineering, Shanghai Jiao Tong University, Shanghai 200240 , China; MoE Key Lab of Artificial Intelligence, Shanghai Jiao Tong University, Shanghai 200240 , China
Wenjie Wu
Wenjie Wu
Shanghai Jiao Tong University
Machine LearningQuantum ComputingLLM
Yuheng Chen
Yuheng Chen
Elmore Family School of Electrical and Computer Engineering, Purdue University
Inverse DesignNanophotonicsMachine LearningSimulation
K
Kaisen Pan
Department of Computer Science and Engineering, Shanghai Jiao Tong University, Shanghai 200240 , China; MoE Key Lab of Artificial Intelligence, Shanghai Jiao Tong University, Shanghai 200240 , China
Xudong Lu
Xudong Lu
PhD student, the Chinese University of Hong Kong
Computer VisionMachine Learning
Z
Zixiang Zhou
Department of Computer Science and Engineering, Shanghai Jiao Tong University, Shanghai 200240 , China; MoE Key Lab of Artificial Intelligence, Shanghai Jiao Tong University, Shanghai 200240 , China
W
Wang Yuhan
MoE Key Lab of Artificial Intelligence, Shanghai Jiao Tong University, Shanghai 200240 , China; Zhiyuan College, Shanghai Jiao Tong University, Shanghai 200240 , China
R
Ruocheng Wang
MoE Key Lab of Artificial Intelligence, Shanghai Jiao Tong University, Shanghai 200240 , China; Zhiyuan College, Shanghai Jiao Tong University, Shanghai 200240 , China
Junchi Yan
Junchi Yan
FIAPR & ICML Board Member, SJTU (2018-), SII (2024-), AWS (2019-2022), IBM (2011-2018)
Computational IntelligenceAI4ScienceMachine LearningAutonomous Driving