🤖 AI Summary
This paper presents a systematic survey of quantum circuit optimization, addressing the dual challenges of accelerating execution and mitigating noise-induced errors on Noisy Intermediate-Scale Quantum (NISQ) hardware—while preserving functional correctness. Methodologically, it unifies hardware-agnostic techniques (e.g., graph rewriting, algorithmic optimization) with hardware-aware approaches (e.g., instruction scheduling, NISQ-adaptive compilation), integrating heuristic search, reinforcement learning, supervised learning, and hybrid quantum-classical frameworks into a multidimensional evaluation framework. Key contributions include: (i) rigorous characterization of performance limits and robustness deficiencies across optimization paradigms; (ii) identification of three critical bottlenecks—deep compression, noise-aware optimization, and automated compiler design; and (iii) proposal of novel research directions in scalability, cross-platform generalization, and compilation robustness. The work provides both theoretical foundations and practical guidelines for advancing the quantum software stack.
📝 Abstract
Optimizing quantum circuits is critical for enhancing computational speed and mitigating errors caused by quantum noise. Effective optimization must be achieved without compromising the correctness of the computations. This survey explores recent advancements in quantum circuit optimization, encompassing both hardware-independent and hardware-dependent techniques. It reviews state-of-the-art approaches, including analytical algorithms, heuristic strategies, machine learning-based methods, and hybrid quantum-classical frameworks. The paper highlights the strengths and limitations of each method, along with the challenges they pose. Furthermore, it identifies potential research opportunities in this evolving field, offering insights into the future directions of quantum circuit optimization.