SoK: ARCUS: On the Efficiency and Efficacy of Hardware Fuzzing

2026-08-24

AI Summary

本文分析了硬件模糊测试在不同抽象层的效率与效果，指出了现有方法的不足，并提出了结合AI等技术的未来研究方向以提高验证解决方案。

Abstract

This work presents a comprehensive analysis of contemporary hardware fuzzing techniques applied across three major abstraction layers: Instruction Set Architecture (ISA), microarchitecture, and Register-Transfer Level (RTL). Our study examines key factors including input stimulus quality, mutation strategies, feedback mechanisms, target platforms, reference models, and achieved coverage. We find challenges, goals, and design trade-offs vary significantly across abstraction layers. We further identify several unmet needs in current hardware fuzzing practices, such as intelligent input generation, reliable and scalable golden reference models, expressive feedback channels, and cross-layer integration. Building on these insights, we outline future research directions, including hybrid fuzzing frameworks, AI-assisted test generation, scalable reference models, standardized evaluation metrics and benchmarks, and human-in-the-loop automation for guided exploration and analysis. Together, they aim to unlock efficient, reliable, and comprehensive hardware verification solutions.

Problem

• hardware fuzzing
• abstraction layers
• input generation
• reference models
• feedback mechanisms

Innovation

• Hybrid Fuzzing Frameworks
• AI-assisted Test Generation
• Scalable Reference Models
• Standardized Evaluation Metrics