Sai Manoj P D
Scholar

Sai Manoj P D

Google Scholar ID: C3SVc70AAAAJ
George Mason University
Hardware securityMachine learning on FPGA/ASICCyber-Physical SystemsEmbedded SystemsLow-power IC design
Citations & Impact
All-time
Citations
3,119
 
H-index
29
 
i10-index
83
 
Publications
20
 
Co-authors
7
list available
Contact
Resume (English only)
Academic Achievements
  • Serves as Associate Editor for IEEE Embedded Systems Letters (ESL)
  • Served on the TPC of HPCA 2022
  • Published a Springer book on practical machine learning for computer scientists and engineers
  • Published extensively in top-tier venues, including:
  • - IEEE TPDS (PIM for energy-efficient MAC in deep CNNs)
  • - IEEE TCAD (defense against side-channel attacks)
  • - DAC, DATE, GLSVLSI, ISLPED, ISCAS, VLSID, ASP-DAC, ISQED, EuroMicro DSD, MetroCAD, IEEE SoCC, etc.
  • - Research spans hardware security, federated learning, malware detection, in-memory computing, intermittent computing, and RFET-based ML acceleration
  • - Multiple papers received best paper nominations (e.g., DATE 2023)
  • Successfully mentored PhD students (e.g., Sanket, Rakib, Abhijitt), who joined companies like AMD and AMD-Xilinx
  • Students awarded A. Richard Newton Young Fellow Award (DAC 2024) and multiple Young Research Fellow recognitions
Research Experience
  • Assistant Professor at George Mason University
  • Leads the HArt (Hardware Assurance, Reliability and Trust) research group
  • Collaborates with University of Virginia (UVA) on supply chain security projects
  • Principal investigator on multiple funded projects from NSF and Virginia Commonwealth Cyber Initiative (CCI), including:
  • - Novel architectures for ML acceleration under diverse workloads
  • - Adversarial learning defenses against invasive reverse engineering
  • - Energy-preserving next-generation cryptography protocols
  • - Autonomous driving security
  • - Node-level malware detection