Bridging Simulation and Silicon: A Study of RISC-V Hardware and FireSim Simulation

2025-09-22

AI Summary

This study presents the first systematic evaluation of FireSim—a FPGA-accelerated simulation framework—for performance prediction of RISC-V hardware. To assess predictive accuracy, we constructed single-core and multi-core models emulating commercial single-board computers and desktop-class processors, and validated them using standard benchmarks, mini-apps, and the LAMMPS molecular dynamics application, comparing simulated execution times against physical measurements. Results show that FireSim reliably captures performance *trends* across configurations, yet exhibits substantial absolute timing errors—typically overestimating runtime. Primary sources of error include simplifications in FireSim’s internal modeling (e.g., abstracted memory subsystem and interconnect latency) and the absence of vendor-disclosed microarchitectural parameters. The work identifies key determinants of prediction fidelity and establishes a methodological foundation—backed by empirical evidence—for assessing simulation trustworthiness in RISC-V co-design workflows.

Technology Category

• Cognitive Modeling & Cognitive Systems: Simulating Human Behavior
• Machine Learning: Hardware-aware ML
• Search and Optimization: Sampling/Simulation-based Search

Application Category

• Search and Retrieval-Augmented AI: Web evaluation methodologies and metrics
• Systems and Infrastructure for Web, Mobile and WoT: Web performance, measurement, and characterization
• User Modeling, Personalization and Recommendation: User modeling and simulation for interactive and conversational systems

Abstract

RISC-V ISA-based processors have recently emerged as both powerful and energy-efficient computing platforms. The release of the MILK-V Pioneer marked a significant milestone as the first desktop-grade RISC-V system. With increasing engagement from both academia and industry, such platforms exhibit strong potential for adoption in high-performance computing (HPC) environments. The open-source, FPGA-accelerated FireSim framework has emerged as a flexible and scalable tool for architectural exploration, enabling simulation of various system configurations using RISC-V cores. Despite its capabilities, there remains a lack of systematic evaluation regarding the feasibility and performance prediction accuracy of FireSim when compared to physical hardware. In this study, we address this gap by modeling a commercially available single-board computer and a desktop-grade RISC-V CPU within FireSim. To ensure fidelity between simulation and real hardware, we first measure the performance of a series of benchmarks to compare runtime behavior under single-core and four-core configurations. Based on the closest matching simulation parameters, we subsequently evaluate performance using a representative mini-application and the LAMMPS molecular dynamics code. Our findings indicate that while FireSim provides valuable insights into architectural performance trends, discrepancies remain between simulated and measured runtimes. These deviations stem from both inherent limitations of the simulation environment and the restricted availability of detailed performance specifications from CPU manufacturers, which hinder precise configuration matching.

Problem

• Evaluating FireSim simulation accuracy against physical RISC-V hardware performance
• Assessing performance prediction fidelity between simulation and real silicon systems
• Identifying discrepancies in runtime behavior across single-core and multi-core configurations

Innovation

• Modeled real RISC-V hardware in FireSim
• Compared simulation with physical benchmark measurements
• Evaluated performance prediction accuracy using applications