Scaling Qubit Mapping and Routing With Position Graph Abstraction and Memoization

2026-05-09

AI Summary

This work addresses the critical bottleneck in compiling for trapped-ion quantum charge-coupled device (TI-QCCD) architectures, where qubit mapping and routing are constrained by physical limitations such as ion transport, trap capacity, and congestion. The authors propose a compilation framework based on a positional graph abstraction that uniformly models executable zones, movement paths, and routing constraints, integrating an enhanced SABRE-inspired heuristic search. Their approach innovatively introduces a relative movement scoring scheme and a memoized congestion-resolution mechanism, which substantially reduces redundant computations without altering scheduling decisions. This advancement significantly improves the scalability of SABRE-like algorithms on TI-QCCD platforms, offering an efficient and practical solution for qubit mapping and routing on heterogeneous quantum hardware.

Abstract

Scalable qubit mapping and routing remain major bottlenecks in quantum compilation, especially for Trapped-Ion Quantum Charge-Coupled device (TI-QCCD) architectures, where qubit interactions require physically shuttling ions under strict movement, congestion, and trap-capacity constraints. We present a compilation framework built around the position graph abstraction, a unified representation of executable locations, movement paths, and routing constraints that enables heuristic mappers to operate directly on shuttling-based hardware. Using this abstraction, we accelerate the SWAP-based BidiREctional heuristic search (SABRE) by implementing relative move scoring, which caches repeated heuristic move evaluations that arise during search, and memoized congestion resolution, which speeds up the resolution of repeated congestion. This optimization removes redundant computation without changing routing/shuttling decisions, improving the scalability of SABRE-based methods on TI-QCCD systems. Our results show that combining an architecture-aware abstraction with memoized heuristic evaluation yields a practical and effective path toward scalable qubit mapping and routing across heterogeneous quantum architectures.

Problem

• qubit mapping
• qubit routing
• TI-QCCD
• quantum compilation
• scalability

Innovation

• position graph abstraction
• memoization
• qubit routing
• trapped-ion QCCD
• SABRE optimization