PhasePoly: An Optimization Framework forPhase Polynomials in Quantum Circuits

2025-06-25

AI Summary

Existing optimization techniques for phase polynomials—ubiquitous in Shor’s algorithm, QAOA, and Hamiltonian simulation—suffer from low efficiency and lack of global coordination. Method: This paper proposes a systematic optimization framework based on parity matrices that unifies treatment of both single- and multi-block phase polynomials, while incorporating hardware constraints to enable logic–physical co-optimization. Unlike conventional greedy subcircuit replacement, our approach leverages algebraic reconstruction over parity matrices to achieve global gate reduction. Results: Experiments show an average 34.92% reduction in total logical gates and 28.53% in CNOT count; after physical mapping, CNOT gates decrease by 25.47% on average, up to 48.57%. The framework supports the construction of reusable, hardware-aware quantum circuit modules.

Technology Category

• Machine Learning: Optimization
• Search and Optimization: Algorithm Configuration
• Constraint Satisfaction and Optimization: Constraint Optimization

Application Category

• Graph Algorithms and Modeling for the Web: Efficient manipulation of static and dynamic Web-related graphs
• Responsible Web: Human-perceived consequences of algorithmic deployment on the web
• Systems and Infrastructure for Web, Mobile and WoT: Experiences and lessons learnt from Web-based algorithms and system deployments

Abstract

Quantum computing has transformative computational power to make classically intractable computing feasible. As the algorithms that achieve practical quantum advantage are beyond manual tuning, quantum circuit optimization has become extremely important and integrated into today's quantum software stack. This paper focuses on a critical type of quantum circuit optimization -- phase-polynomial optimization. Phase polynomials represents a class of building-block circuits that appear frequently in quantum modular exponentials (the most time-consuming component in Shor's factoring algorithm), in quantum approximation optimization algorithms (QAOA), and in Hamiltonian simulations. Compared to prior work on phase polynomials, we focus more on the impact of phase polynomial synthesis in the context of whole-circuit optimization, from single-block phase polynomials to multiple block phase polynomials, from greedy equivalent sub-circuit replacement strategies to a systematic parity matrix optimization approach, and from hardware-oblivious logical circuit optimization to hardware-friendly logical circuit optimization. We also provide a utility of our phase polynomial optimization framework to generate hardware-friendly building blocks. Our experiments demonstrate improvements of up to 50%-with an average total gate reduction of 34.92%-and reductions in the CNOT gate count of up to 48.57%, averaging 28.53%, for logical circuits. Additionally, for physical circuits, we achieve up to 47.65% CNOT gate reduction with an average reduction of 25.47% across a representative set of important benchmarks.

Problem

• Optimizing phase polynomials in quantum circuits
• Enhancing whole-circuit optimization strategies
• Reducing gate counts for logical and physical circuits

Innovation

• Systematic parity matrix optimization approach
• Hardware-friendly logical circuit optimization
• Multi-block phase polynomial synthesis