On the Stability and Realizability of Recurrent Polynomial Surrogate Ternary Logic Gate Networks

📅 2026-05-23
📈 Citations: 0
Influential: 0
📄 PDF
🤖 AI Summary
This work addresses the lack of output stability and interpretability guarantees in existing recurrent neural networks when deployed in safety-critical systems under sensor degradation. The authors propose the R-DTLGN architecture, which uniquely integrates the monotonicity of Kleene three-valued logic with formal robustness to input degradation into a recurrent framework. By training with continuous polynomial surrogates and hardening to discrete three-valued logic circuits at inference time, the model ensures that missing inputs cannot erroneously trigger safe-state classifications. The hidden state dimensionality is determined directly by Signal Temporal Logic (STL) specifications, eliminating the need for hyperparameter tuning. Experiments on the D4RL PointMaze benchmark demonstrate that the approach achieves high prediction accuracy, strong robustness to predicate dropout, and enables a controllable trade-off between accuracy and safety.
📝 Abstract
Recurrent Neural Networks (RNNs) can learn to predict Signal Temporal Logic (STL) verdicts online from partial trajectories, but deploying them as runtime monitors in safety-critical systems demands more than predictive accuracy. Standard RNN architectures offer no structural guarantee that outputs degrade gracefully under sensor degradation; a dropped input can silently flip a verdict from safe to unsafe. We introduce the Recurrent Differentiable Ternary Logic Gate Network (R-DTLGN), a recurrent architecture that operates over Kleene's three-valued logic $\{-1, 0, +1\}$, where $0$ explicitly represents unknown. The R-DTLGN trains through continuous polynomial surrogates and hardens to a discrete ternary logic circuit at inference. We analyze the hardened circuit through two gate vocabularies derived from two orderings on the ternary domain: numerically monotone gates ensure stable recurrent dynamics, while information-monotone gates, when present, guarantee principled abstention (unknown inputs never produce wrong outputs) and monotonicity in input certainty (more information can only improve the verdict). We show that the recurrent connections required by bounded STL operators use exclusively AND and OR, which belong to both vocabularies, linking the monitoring task to the architecture's guarantees. A realizability bound derived from the STL formula's temporal operators directly sizes the network's hidden state, replacing hyperparameter search with a formula-driven specification. We evaluate on STL specifications over D4RL PointMaze navigation data, testing prediction accuracy, degradation under predicate dropout, and the accuracy-versus-safety tradeoff between two label construction pipelines. The R-DTLGN is, to our knowledge, the first recurrent architecture that couples learned temporal prediction with formal degradation guarantees rooted in three-valued logic.
Problem

Research questions and friction points this paper is trying to address.

Recurrent Neural Networks
Signal Temporal Logic
three-valued logic
runtime monitoring
sensor degradation
Innovation

Methods, ideas, or system contributions that make the work stand out.

Recurrent Differentiable Ternary Logic Gate Network
three-valued logic
Signal Temporal Logic
monotone gates
formal realizability