EventShiftFlow: Towards Hardware-efficient FPGA-based Flow Estimation

2026-05-27

AI Summary

This work proposes a fully fixed-point, non-iterative, streaming optical flow algorithm tailored for efficient deployment on resource-constrained FPGAs. By partitioning asynchronous event streams into fixed-time windows and representing them as 1-bit spatial occupancy grids, the method evaluates multiple velocity hypotheses in parallel using only integer logic—comprising shift registers, counters, comparators, and LUT-based multipliers—without requiring frame reconstruction, floating-point arithmetic, or division operations. A single-axis prototype was successfully implemented on a Xilinx Artix-7 FPGA, occupying less than 2 kB of memory and achieving 99.5% directional accuracy under event densities of 10–40%. To the best of our knowledge, this is the first demonstration of low-latency, sparse velocity estimation on an FPGA without relying on DSP blocks or dedicated dividers.

Abstract

Event-based vision sensors offer asynchronous, high-temporal-resolution measurements that are attractive for low-latency robotic perception, but many event-based motion estimation methods are computationally intensive and difficult to map to FPGA hardware. We present a streaming velocity estimator that discretizes asynchronous events into fixed-duration time bins, constructs a 1-bit spatial occupancy grid, and evaluates multiple velocity hypotheses in parallel using only fixed-width integer logic - shift registers, counters, comparators, and small LUT-mapped multiplies - with no dividers and no DSP blocks. It requires no frame reconstruction, no floating-point arithmetic, and no iterative optimization. The method deliberately trades dense sub-pixel optical flow for a sparse, quantized velocity estimate at each active pixel, suited to low-latency tasks such as reactive obstacle avoidance on size-, weight-, and power-constrained platforms. On noisy synthetic data with known ground-truth velocities, the method recovers both magnitude and direction, with magnitude estimates being most challenged when objects of different velocities intersect. On a real event-camera sequence, directional accuracy reaches 99.5% across all four evaluated motion segments, with performance remaining robust across occupancy densities in the 10-40% range. We characterize the algorithm's density-dependent behavior, present a parameter sensitivity analysis, show that the proposed datapath requires less than 2 kB of storage, and implement a single-axis prototype on a low-cost Xilinx Artix-7.

Problem

• event-based vision
• optical flow estimation
• FPGA implementation
• hardware efficiency
• low-latency perception

Innovation

• event-based vision
• FPGA-efficient
• sparse optical flow
• integer-only arithmetic
• streaming velocity estimation