🤖 AI Summary
To address the dual challenges of conflict elimination and mask load balancing in multi-patterning decomposition for advanced technology nodes, this paper formulates the problem as a constrained graph coloring task and proposes an unsupervised graph neural network (GNN) framework. The method requires no labeled data and jointly optimizes the primary objective—achieving zero conflicts—and the secondary objective—balancing feature counts across masks. It first employs a GNN to generate high-quality initial colorings, then refines them iteratively via a GNN-guided heuristic strategy integrated with simulated annealing. Evaluated on both private and public layout datasets, the approach achieves 100% zero-conflict decompositions while significantly improving color distribution balance—reducing standard deviation by ≥40%. The framework is reproducible, computationally efficient, and demonstrates strong potential for industrial deployment.
📝 Abstract
Multipatterning is an essential decomposition strategy in electronic design automation (EDA) that overcomes lithographic limitations when printing dense circuit layouts. Although heuristic-based backtracking and SAT solvers can address these challenges, they often struggle to simultaneously handle both complex constraints and secondary objectives. In this study, we present a hybrid workflow that casts multipatterning as a variant of a constrained graph coloring problem with the primary objective of minimizing feature violations and a secondary objective of balancing the number of features on each mask. Our pipeline integrates two main components: (1) A GNN-based agent, trained in an unsupervised manner to generate initial color predictions, which are refined by (2) refinement strategies (a GNN-based heuristic and simulated annealing) that together enhance solution quality and balance. Experimental evaluation in both proprietary data sets and publicly available open source layouts demonstrate complete conflict-free decomposition and consistent color balancing. The proposed framework provides a reproducible, data-efficient and deployable baseline for scalable layout decomposition in EDA workflows.