🤖 AI Summary
To address the low detection accuracy and poor environmental adaptability of lane path detection in urban roads and robotic tracks, this paper proposes an FPGA-based real-time lane detection system. The system integrates a temperature- and illumination-adaptive control unit to significantly enhance robustness under varying lighting and thermal conditions. It employs a hardware-optimized Sobel edge detection algorithm, supporting 416×416 input resolution and achieving a single-frame processing latency of only 1.17 ms at a 150 MHz clock frequency. The system outputs key metrics in real time: number of lanes, current lane index, and left/right lane boundary coordinates. Compared with conventional software-based or less-optimized hardware approaches, the proposed design achieves high detection accuracy while substantially reducing computational latency. This yields an efficient, stable, and deployable hardware solution for embedded intelligent vehicle path recognition.
📝 Abstract
Intelligent vehicles are one of the most important outcomes gained from the world tendency toward automation. Applications of IVs, whether in urban roads or robot tracks, do prioritize lane path detection. This paper proposes an FPGA-based Lane Detector Vehicle LDV architecture that relies on the Sobel algorithm for edge detection. Operating on 416 x 416 images and 150 MHz, the system can generate a valid output every 1.17 ms. The valid output consists of the number of present lanes, the current lane index, as well as its right and left boundaries. Additionally, the automated light and temperature control units in the proposed system enhance its adaptability to the surrounding environmental conditions.