Simplifier: A New Tool for Boolean Circuit Simplification

2025-03-24

AI Summary

This paper addresses Boolean circuit minimization—reducing circuit size while preserving functional equivalence. We propose the first lightweight subcircuit replacement framework leveraging Boolean function clustering and SAT-based pre-optimization: an optimized circuit library is precomputed; function clustering compresses the search space; and a linear-time subcircuit traversal algorithm is designed, with theoretical proof that only a linear number of candidate subcircuits need be examined to guarantee effective simplification. The method supports both AIG and BENCH formats and achieves simplification within seconds. Experimental evaluation shows a 4% additional area reduction over ABC on AIG circuits, and an average 30% area reduction on the BENCH benchmark suite—substantially outperforming state-of-the-art tools.

Technology Category

• Constraint Satisfaction and Optimization: Satisfiability Modulo Theories
• Machine Learning: Optimization
• Search and Optimization: Combinatorial Optimization

Application Category

• Graph Algorithms and Modeling for the Web: Representation, reconstruction, and subgraph or motif discovery in Web-related graphs
• Web Mining and Content Analysis: Normalization, clustering, classification, and summarization of Web text
• Search and Retrieval-Augmented AI: Efficiency and scalability of Web search engines

Abstract

The Boolean circuit simplification problem involves finding a smaller circuit that computes the same function as a given Boolean circuit. This problem is closely related to several key areas with both theoretical and practical applications, such as logic synthesis, satisfiability, and verification. In this paper, we present Simplifier, a new open source tool for simplifying Boolean circuits. The tool optimizes subcircuits with three inputs and at most three outputs, seeking to improve each one. It is designed as a low-effort method that runs in just a few seconds for circuits of reasonable size. This efficiency is achieved by combining two key strategies. First, the tool utilizes a precomputed database of optimized circuits, generated with SAT solvers after carefully clustering Boolean functions with three inputs and up to three outputs. Second, we demonstrate that it is sufficient to check a linear number of subcircuits, relative to the size of the original circuit. This allows a single iteration of the tool to be executed in linear time. We evaluated the tool on a wide range of Boolean circuits, including both industrial and hand-crafted examples, in two popular formats: AIG and BENCH. For AIG circuits, after applying the state-of-the-art ABC framework, our tool achieved an additional 4% average reduction in size. For BENCH circuits, the tool reduced their size by an average of 30%.

Problem

• Develops a tool for simplifying Boolean circuits efficiently
• Optimizes subcircuits with three inputs and few outputs
• Achieves significant size reduction in industrial and hand-crafted circuits

Innovation

• Precomputed database of optimized circuits
• Linear time subcircuit checking strategy
• Efficient Boolean circuit simplification tool