VARA: A Voltage-Aware ReRAM-Based Accelerator for Energy-Efficient Computing

๐Ÿ“… 2026-08-31
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ๆœฌๆ–‡ๆๅ‡บไบ†ไธ€็ง็”ตๅŽ‹ๆ„Ÿ็Ÿฅ็š„ReRAMๅŠ ้€Ÿๅ™จ(VARA)๏ผŒ้€š่ฟ‡็”ตๅŽ‹ๆ„Ÿ็Ÿฅ่ฎญ็ปƒ็ฎ—ๆณ•ๅ’Œๅ…ฑ้›ถๆฟ€ๆดป้‡ๆŽ’ๅบๆ–นๆกˆ๏ผŒไผ˜ๅŒ–ๆฟ€ๆดปๅˆ†ๅธƒ๏ผŒๆ้ซ˜่ฎก็ฎ—่ƒฝๆ•ˆใ€‚
๐Ÿ“ Abstract
ReRAM-based in-memory computing (IMC) architectures are widely regarded as a promising approach to alleviating the computational bottleneck of conventional architectures. Since ReRAM crossbars perform matrix-vector multiplication (MVM) in the analog domain, their computational energy consumption is highly dependent on weight and activation distributions. However, most existing ReRAM accelerators focus primarily on weight optimization while paying limited attention to the impact of activations on computational energy consumption, leaving the energy-saving potential of activation sparsity largely underexploited. In this paper, we propose a voltage-aware ReRAM-based accelerator (VARA), along with its accompanying design methodology. Specifically, we first introduce a voltage-aware training (VAT) algorithm that incorporates a preset threshold into the activation function to steer the activation distribution toward zero values, thereby enhancing activation sparsity. Building upon this, we further propose a co-zero activation reordering (CAR) scheme for crossbar-level computation skipping. CAR clusters activation dimensions based on their co-zero correlations and consistently reorders both the activation matrix and its corresponding weights. This process consolidates scattered zero activations into contiguous zero-valued regions to maximize the benefits of crossbar-level computation skipping. Extensive experimental results demonstrate that, with only marginal accuracy loss, VARA reduces the average total system energy consumption by 60.12\% and improves the average system energy efficiency by 2.68$\times$ compared to the baseline, outperforming existing state-of-the-art accelerators for sparse-activation optimization.
Problem

Research questions and friction points this paper is trying to address.

ReRAM
activation sparsity
energy consumption
in-memory computing
matrix-vector multiplication
Innovation

Methods, ideas, or system contributions that make the work stand out.

voltage-aware training
co-zero activation reordering
activation sparsity
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Yintao He
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