Re$^{ ext{2}}$MaP: Macro Placement by Recursively Prototyping and Packing Tree-based Relocating

2025-11-11

AI Summary

This paper addresses the challenge of expert-level macro placement in ultra-large-scale integrated circuits. Methodologically, it proposes a synergistic optimization framework combining recursive prototype construction and packing-tree-driven macro relocation. Specifically: (1) it introduces PPA-aware multi-level macro clustering and a unified connectivity matrix model; (2) it integrates DREAMPlace’s hybrid placement prototyping with ABPlace’s elliptical angular analytical optimization to achieve uniform peripheral macro distribution; and (3) it designs an evolutionary-search-based structured packing-tree relocation strategy to jointly optimize macro-group placement and intra-group macro positioning. Key innovations include angular analytical modeling, tree-structured relocation, and expert-knowledge-guided cost-function integration. Experimental results demonstrate that, compared to Hier-RTLMP, the method improves worst negative slack by 10.26% on average (up to 22.22%) and total negative slack by 33.97% (up to 97.91%), while outperforming ReMaP across timing, power, DRC compliance, and runtime efficiency.

Technology Category

• Planning, Routing, and Scheduling: Optimization of Spatio-temporal Systems
• Search and Optimization: Sampling/Simulation-based Search
• Machine Learning: Hardware-aware ML

Application Category

• Graph Algorithms and Modeling for the Web: Efficient manipulation of static and dynamic Web-related graphs
• Economics, Online Markets and Human Computation: Incentives in network design for Web infrastructures and ecosystems
• Security and Privacy: Large-scale security measurements

Abstract

This work introduces the Re$^{ ext{2}}$MaP method, which generates expert-quality macro placements through recursively prototyping and packing tree-based relocating. We first perform multi-level macro grouping and PPA-aware cell clustering to produce a unified connection matrix that captures both wirelength and dataflow among macros and clusters. Next, we use DREAMPlace to build a mixed-size placement prototype and obtain reference positions for each macro and cluster. Based on this prototype, we introduce ABPlace, an angle-based analytical method that optimizes macro positions on an ellipse to distribute macros uniformly near chip periphery, while optimizing wirelength and dataflow. A packing tree-based relocating procedure is then designed to jointly adjust the locations of macro groups and the macros within each group, by optimizing an expertise-inspired cost function that captures various design constraints through evolutionary search. Re$^{ ext{2}}$MaP repeats the above process: Only a subset of macro groups are positioned in each iteration, and the remaining macros are deferred to the next iteration to improve the prototype's accuracy. Using a well-established backend flow with sufficient timing optimizations, Re$^{ ext{2}}$MaP achieves up to 22.22% (average 10.26%) improvement in worst negative slack (WNS) and up to 97.91% (average 33.97%) improvement in total negative slack (TNS) compared to the state-of-the-art academic placer Hier-RTLMP. It also ranks higher on WNS, TNS, power, design rule check (DRC) violations, and runtime than the conference version ReMaP, across seven tested cases. Our code is available at https://github.com/lamda-bbo/Re2MaP.

Problem

• Optimizing macro placement for improved timing slack and dataflow
• Distributing macros uniformly near chip periphery while minimizing wirelength
• Addressing design constraints through recursive prototyping and evolutionary search

Innovation

• Recursively prototyping and packing tree-based macro relocating
• Multi-level macro grouping with PPA-aware cell clustering
• Angle-based analytical placement optimizing wirelength and dataflow