π€ AI Summary
To address thermal-noise-induced degradation of effective number of bits (ENOB) in charge-domain compute-in-memory (CIM), this work presents the first cryogenic electrical characterization of ferroelectric non-volatile capacitors (nvCaps) at 77 K on a 28-nm CMOS platform. We systematically evaluate their memory window, on-state retention, and array-level multiply-accumulate (MAC) performance. Leveraging low-temperature measurements, physics-based device modeling, and SPICE simulations, we perform a cross-scale analysis bridging device behavior to circuit-level functionality. Results demonstrate that cryogenic operation substantially suppresses thermal noise: the ENOB of MAC operations in a 128Γ128 capacitive crossbar array improves from less than 4 bits at room temperature to approximately 5 bits at 77 Kβvalidating the efficacy of cryogenic operation for enhancing analog CIM accuracy. This work establishes a practical, process-compatible pathway toward low-noise, high-precision charge-domain CIM.
π Abstract
Ferroelectric-based capacitive crossbar arrays have been proposed for energy-efficient in-memory computing in the charge domain. They combat the challenges like sneak paths and high static power faced by resistive crossbar arrays but are susceptible to thermal noise limiting the effective number of bits (ENOB) for the weighted sum. A direct way to reduce this thermal noise is by lowering the temperature as thermal noise is proportional to temperature. In this work, we first characterize the non-volatile capacitors (nvCaps) on a foundry 28 nm platform at cryogenic temperatures to evaluate the memory window, ON state retention as a function of temperature down to 77K, and then use the calibrated device models to simulate the capacitive crossbar arrays in SPICE at lower temperatures to demonstrate higher ENOB (~5 bits) for 128x128 multiple-and-accumulate (MAC) operations.