Valinor: Architectural Support for Fast, Energy-Efficient and Programmable Physical Memory Allocation

2026-07-16

AI Summary

This work addresses the high latency and energy overhead of traditional physical memory allocation, which stems from frequent kernel-mode page fault handling and particularly hampers short-lived workloads such as serverless functions and microservices. The authors propose a hardware-software co-designed memory allocation mechanism that employs a programmable hardware allocation engine to execute a compact allocation library provided by the operating system. This approach preserves the flexibility of software-defined allocation policies while achieving performance close to that of fixed-function hardware. Implemented on a RISC-V BOOM soft core with Linux, the design is evaluated on both real hardware and a full-system simulator. Results demonstrate a 17× speedup in allocation throughput, a 16% improvement in end-to-end application performance, and an 8% reduction in energy consumption, with all six evaluated allocation policies achieving hardware-level efficiency—marking the first unification of programmability and high performance in memory allocation.

Abstract

Physical memory allocation establishes virtual-to-physical mappings on demand. In current systems, each minor page fault traps into the kernel and triggers pipeline flushes, stalls, and a long sequence of allocation steps that can cost tens of thousands of cycles. These overheads are increasingly significant for short-lived workloads such as serverless functions and microservices, where minor faults can account for up to 54% of runtime and up to 40% of system energy. Prior hardware allocation proposals avoid traps and context switches, but either sacrifice useful placement optimizations or rely on fixed-function logic that cannot adapt to new policies or changing hardware conditions. We present Valinor, a hardware-OS cooperative memory allocation substrate that combines software flexibility with hardware-class performance. Valinor introduces a programmable hardware allocation engine that executes compact OS-supplied allocation libraries at close to fixed-hardware speed. It supports diverse policies, including short-lived object allocators, integrity mechanisms, and hardware-telemetry-guided placement. We implement Valinor on a BOOM RISC-V soft core running Linux and in a full-system simulator. On real hardware, Valinor accelerates allocation by 17x, improves end-to-end performance by 16%, and reduces energy consumption by up to 8%. Full-system simulation further evaluates the programmable allocation engine and six allocation libraries, showing that Valinor provides hardware-class performance without sacrificing programmability.

Problem

• physical memory allocation
• page fault overhead
• energy efficiency
• programmability
• short-lived workloads

Innovation

• programmable memory allocation
• hardware-software co-design
• physical memory management
• energy-efficient computing
• RISC-V