Scholar
Rahul Bera
Google Scholar ID: swsuim0AAAAJ
ETH Zurich
Citations & Impact
Citations
471
H-index
9
i10-index
9
Publications
20
Co-authors
9
list available
Contact
Publications
Resume (English only)
Academic Achievements
- Insufficient information
Research Experience
- - Graduate Research Intern, Mar - Aug 2023, Intel Processor Architecture Research Lab, India, Mentors: Anant V. Nori and Sreenivas Subramoney
- - Architecture Researcher, Feb 2017 - Aug 2019, Intel Processor Architecture Research Lab, India, Mentors: Anant V. Nori and Sreenivas Subramoney
- - Co-op Engineer, Jul - Dec 2015, Server SoC Perf Team, AMD India, Bangalore, Mentor: Dr. Kanishka Lahiri
Education
- - Doctor of Philosophy, Sept 2019 - Present, Advisor: Prof. Dr. Onur Mutlu, Swiss Federal Institute of Technology (ETH), Zürich
- - Master of Technology in Computer Science, July 2014 - Jan 2017, Advisor: Prof. Dr. Mainak Chaudhuri, Indian Institute of Technology, Kanpur
- - Bachelor of Engineering in Computer Science, July 2010 - April 2014, Jadavpur University, Kolkata
Background
- Research Interests: Memory hierarchy design and energy-efficient architectures. Currently in the industrial job market seeking full-time (research) positions, with a preference for Zurich.
