Institution profile

Fairleigh Dickinson University

Academic institutionnorthamerica · us
Official website
Research library8linked papers
Opportunities0open roles
Selected work

Representative Papers

Structural MRI Synthesis for Alzheimer's Disease via Conditional Diffusion on Anatomical Masks

Jun 16, 2026

This study addresses the challenge of synthesizing structural MRI scans for Alzheimer’s disease (AD), where neurodegenerative changes are subtle, region-specific, and progressive. The authors propose the first application of the conditional diffusion model Med-DDPM to generate AD-specific 3D MRI images, using anatomical segmentation masks from the ADNI dataset as conditioning inputs to accurately capture AD-related pathological alterations. Experimental results demonstrate that a segmentation model trained solely on synthetic data achieves a Dice score of 0.6532, comparable to that obtained with real data (0.6513). Furthermore, training with a hybrid dataset combining real and synthetic images yields the best performance, improving the Dice score to 0.7244 and significantly enhancing model recall and clinical diagnostic potential.

0 citationsRead paper

RH+: Row-Hit-Optimized Scheduling for PIM-based LLM Inference

Jun 03, 2026

This work addresses the inefficiency of conventional scheduling in PIM-based autoregressive LLM inference, where performance is bottlenecked by the DRAM row cycle time (nRC), rendering optimizations targeting nCCDAB ineffective for GEMV operations. To overcome this limitation, the authors propose RH+, a novel scheduling method that reengineers the address mapping strategy to co-locate consecutive MAC operations within the same DRAM row. By merely adjusting the access stride, RH+ substantially enhances row locality, circumvents the nRC constraint, and overturns the traditional host-centric interleaving paradigm. Evaluated on an HBM3 PIM architecture using cycle-accurate simulation across four LLM workloads, RH+ achieves 8–12× speedup, over 74% energy reduction, and up to 52× improvement in energy-delay product (EDP).

0 citationsRead paper

Regular-Activation Concentration: Characterizing Column-Level Output Sparsity Across Diffusion Model Architectures

May 30, 2026

This work addresses a critical mismatch between existing diffusion model acceleration techniques—which rely on element-wise activation sparsity—and the column-granularity data processing inherent in modern hardware, leading to overestimated practical sparsity benefits. The study presents the first systematic characterization of output sparsity across seven diffusion models at the column level, identifying three distinct activation distribution patterns and uncovering the interplay between model architecture and memory layout optimization. Through hardware-aware column-level sparsity profiling, cycle-accurate GDDR6 simulation, multi-threshold accuracy evaluation, and cross-modal comparison, the authors demonstrate that memory stalls account for 84–89% of total execution cycles and that element-wise sparsity poorly predicts actual hardware gains. Their approach achieves up to 30.6% reduction in execution cycles on UNet+Transformer models, with a maximum latency decrease (MLD) of 50.8%.

0 citationsRead paper

Regular-Dead on Arrival: Characterizing and Protecting Against Dead-Entry TLB Misses in GPU Microarchitectures

May 29, 2026

This work addresses severe performance degradation in GPU workloads caused by redundant L2 TLB misses due to frequent reinstallation of recently evicted page table entries. It introduces, for the first time, a binary classification of such “dead-entry” TLB misses into two categories: burst amplification triggered by shared pages and capacity overflow induced by independent pages. Guided by this insight, the authors design DEPOT, a lightweight defense mechanism that employs a mere 1KB Bloom filter to effectively shield newly reinstalled entries from immediate eviction. DEPOT is fully compatible with existing TLB prefetching and compression techniques. Experimental results demonstrate that DEPOT improves IPC by up to 72% on interference-sensitive workloads without imposing overhead on others, and when combined with state-of-the-art TLB optimizations, yields additional performance gains of 2%–7%.

0 citationsRead paper
Recent publications

Latest Papers

Structural MRI Synthesis for Alzheimer's Disease via Conditional Diffusion on Anatomical Masks

Jun 16, 2026

This study addresses the challenge of synthesizing structural MRI scans for Alzheimer’s disease (AD), where neurodegenerative changes are subtle, region-specific, and progressive. The authors propose the first application of the conditional diffusion model Med-DDPM to generate AD-specific 3D MRI images, using anatomical segmentation masks from the ADNI dataset as conditioning inputs to accurately capture AD-related pathological alterations. Experimental results demonstrate that a segmentation model trained solely on synthetic data achieves a Dice score of 0.6532, comparable to that obtained with real data (0.6513). Furthermore, training with a hybrid dataset combining real and synthetic images yields the best performance, improving the Dice score to 0.7244 and significantly enhancing model recall and clinical diagnostic potential.

0 citationsRead paper

RH+: Row-Hit-Optimized Scheduling for PIM-based LLM Inference

Jun 03, 2026

This work addresses the inefficiency of conventional scheduling in PIM-based autoregressive LLM inference, where performance is bottlenecked by the DRAM row cycle time (nRC), rendering optimizations targeting nCCDAB ineffective for GEMV operations. To overcome this limitation, the authors propose RH+, a novel scheduling method that reengineers the address mapping strategy to co-locate consecutive MAC operations within the same DRAM row. By merely adjusting the access stride, RH+ substantially enhances row locality, circumvents the nRC constraint, and overturns the traditional host-centric interleaving paradigm. Evaluated on an HBM3 PIM architecture using cycle-accurate simulation across four LLM workloads, RH+ achieves 8–12× speedup, over 74% energy reduction, and up to 52× improvement in energy-delay product (EDP).

0 citationsRead paper

Regular-Activation Concentration: Characterizing Column-Level Output Sparsity Across Diffusion Model Architectures

May 30, 2026

This work addresses a critical mismatch between existing diffusion model acceleration techniques—which rely on element-wise activation sparsity—and the column-granularity data processing inherent in modern hardware, leading to overestimated practical sparsity benefits. The study presents the first systematic characterization of output sparsity across seven diffusion models at the column level, identifying three distinct activation distribution patterns and uncovering the interplay between model architecture and memory layout optimization. Through hardware-aware column-level sparsity profiling, cycle-accurate GDDR6 simulation, multi-threshold accuracy evaluation, and cross-modal comparison, the authors demonstrate that memory stalls account for 84–89% of total execution cycles and that element-wise sparsity poorly predicts actual hardware gains. Their approach achieves up to 30.6% reduction in execution cycles on UNet+Transformer models, with a maximum latency decrease (MLD) of 50.8%.

0 citationsRead paper

Regular-Dead on Arrival: Characterizing and Protecting Against Dead-Entry TLB Misses in GPU Microarchitectures

May 29, 2026

This work addresses severe performance degradation in GPU workloads caused by redundant L2 TLB misses due to frequent reinstallation of recently evicted page table entries. It introduces, for the first time, a binary classification of such “dead-entry” TLB misses into two categories: burst amplification triggered by shared pages and capacity overflow induced by independent pages. Guided by this insight, the authors design DEPOT, a lightweight defense mechanism that employs a mere 1KB Bloom filter to effectively shield newly reinstalled entries from immediate eviction. DEPOT is fully compatible with existing TLB prefetching and compression techniques. Experimental results demonstrate that DEPOT improves IPC by up to 72% on interference-sensitive workloads without imposing overhead on others, and when combined with state-of-the-art TLB optimizations, yields additional performance gains of 2%–7%.

0 citationsRead paper