Institution profile

Fulda University of Applied Sciences

Academic institutioneurope · de
Official website
Research library3linked papers
Opportunities0open roles
Selected work

Representative Papers

An Empirical Analysis of High-Performance Computing Education in Germany

Jun 30, 2026

This study addresses the persistent gap between theory and practice in high-performance computing (HPC) education across German universities, alongside insufficient integration of HPC into undergraduate curricula and limited access to teaching resources. Conducting the first nationwide systematic survey of 102 institutions, the research combines syllabus analysis, course schedule reviews, and an inventory of local HPC cluster infrastructure to empirically uncover structural imbalances in HPC education and establish a statistical link between course offerings and resource accessibility. Findings reveal that while 67.6% of universities offer HPC courses, these are predominantly elective modules at the master’s level; only 23.0% explicitly support instructional use of local clusters. This scarcity of accessible infrastructure significantly hinders the development of students’ practical competencies, providing critical empirical evidence to inform HPC education reform.

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CRoSS: A Continual Robotic Simulation Suite for Scalable Reinforcement Learning with High Task Diversity and Realistic Physics Simulation

Feb 04, 2026

This work addresses the challenges of policy forgetting in continual reinforcement learning and the lack of high-fidelity, diverse robotic simulation benchmarks by introducing an extensible Gazebo-based simulation suite. The platform supports both differential-drive mobile robots and seven-degree-of-freedom manipulators, integrating multimodal sensors—including Lidar, cameras, and collision detection—and offering control interfaces in both joint and Cartesian spaces. A key innovation is the incorporation of a kinematics-only accelerated variant that bypasses full physics simulation, achieving two orders of magnitude improvement in training efficiency while preserving high physical fidelity. Deployed via Apptainer containers, the suite is compatible with standard algorithms such as DQN and policy gradient methods, providing an out-of-the-box, reproducible, and task-diverse experimental environment that establishes a robust benchmark for continual reinforcement learning research.

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Implementation and Analysis of Thermometer Encoding in DWN FPGA Accelerators

Dec 17, 2025

The hardware overhead of thermometer encoding (TE) in differential weightless neural network (DWN) accelerators on FPGAs has remained unquantified, hindering accurate resource estimation and optimization. Method: This work introduces the first explicit analytical model of TE overhead and integrates it into the DWN hardware generation flow, enabling systematic logic-resource analysis of TE. Contribution/Results: Experiments reveal that TE dominates resource consumption in small-scale DWNs, increasing LUT utilization by up to 3.20×—identifying it as a critical bottleneck. By enabling encoding-aware co-design, this study fills a key gap in modeling and evaluating encoding overhead in practical DWN deployment, providing the first quantitative foundation for joint optimization of TE and compute units. Validation on the Jet Substructure Classification benchmark confirms the model’s accuracy and practical relevance.

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Recent publications

Latest Papers

An Empirical Analysis of High-Performance Computing Education in Germany

Jun 30, 2026

This study addresses the persistent gap between theory and practice in high-performance computing (HPC) education across German universities, alongside insufficient integration of HPC into undergraduate curricula and limited access to teaching resources. Conducting the first nationwide systematic survey of 102 institutions, the research combines syllabus analysis, course schedule reviews, and an inventory of local HPC cluster infrastructure to empirically uncover structural imbalances in HPC education and establish a statistical link between course offerings and resource accessibility. Findings reveal that while 67.6% of universities offer HPC courses, these are predominantly elective modules at the master’s level; only 23.0% explicitly support instructional use of local clusters. This scarcity of accessible infrastructure significantly hinders the development of students’ practical competencies, providing critical empirical evidence to inform HPC education reform.

0 citationsRead paper

CRoSS: A Continual Robotic Simulation Suite for Scalable Reinforcement Learning with High Task Diversity and Realistic Physics Simulation

Feb 04, 2026

This work addresses the challenges of policy forgetting in continual reinforcement learning and the lack of high-fidelity, diverse robotic simulation benchmarks by introducing an extensible Gazebo-based simulation suite. The platform supports both differential-drive mobile robots and seven-degree-of-freedom manipulators, integrating multimodal sensors—including Lidar, cameras, and collision detection—and offering control interfaces in both joint and Cartesian spaces. A key innovation is the incorporation of a kinematics-only accelerated variant that bypasses full physics simulation, achieving two orders of magnitude improvement in training efficiency while preserving high physical fidelity. Deployed via Apptainer containers, the suite is compatible with standard algorithms such as DQN and policy gradient methods, providing an out-of-the-box, reproducible, and task-diverse experimental environment that establishes a robust benchmark for continual reinforcement learning research.

0 citationsRead paper

Implementation and Analysis of Thermometer Encoding in DWN FPGA Accelerators

Dec 17, 2025

The hardware overhead of thermometer encoding (TE) in differential weightless neural network (DWN) accelerators on FPGAs has remained unquantified, hindering accurate resource estimation and optimization. Method: This work introduces the first explicit analytical model of TE overhead and integrates it into the DWN hardware generation flow, enabling systematic logic-resource analysis of TE. Contribution/Results: Experiments reveal that TE dominates resource consumption in small-scale DWNs, increasing LUT utilization by up to 3.20×—identifying it as a critical bottleneck. By enabling encoding-aware co-design, this study fills a key gap in modeling and evaluating encoding overhead in practical DWN deployment, providing the first quantitative foundation for joint optimization of TE and compute units. Validation on the Jet Substructure Classification benchmark confirms the model’s accuracy and practical relevance.

0 citationsRead paper