side-channel leakage modeling and measurement

This paper systematically investigates the threat mechanisms and defense strategies against memory-based side-channel attacks (SCAMs). Addressing major attack vectors—including cache timing, speculative execution, and Rowhammer—the work establishes, for the first time, a unified taxonomy covering attack types, target systems, exploitation vectors, and capability requirements. Through rigorous threat modeling and microarchitectural analysis, it comparatively evaluates the effectiveness and inherent trade-offs of existing defenses. Furthermore, it proposes a practical, phased security roadmap for mitigating SCAMs. The resulting framework constitutes the first comprehensive, structured, and extensible SCAM survey, integrating theoretical rigor with engineering relevance. It serves as an authoritative reference for advancing fundamental research in academia and guiding memory-hardening initiatives in industry. (136 words)

This work proposes SCAgent, a novel framework that leverages large language model (LLM) agents for automated side-channel discovery and verification—a task traditionally reliant on manual effort and challenging to scale in complex systems. SCAgent generates hypotheses through semantic reasoning over system documentation, mitigates hallucination via explicit verification mechanisms and semantic consistency constraints, and introduces time-shift-robust temporal features tailored for foundation models to enable efficient few-shot analysis. Evaluated on iOS, the framework successfully reproduces classic fingerprinting attacks and uncovers multiple previously unknown sensitive activities, demonstrating its capability to automatically and accurately identify side-channel vulnerabilities even with limited data.

This work demonstrates that public release of spectral density statistics can inadvertently leak hidden configuration parameters of generative models. To address this, the authors propose a statistical side-channel auditing framework based on a gamma- and covariance-weighted log-spectral channel model, employing Kullback–Leibler divergence and Chernoff information to quantify information leakage. The study establishes a ninth-order relationship among leakage magnitude, bandwidth, and sample size under finite-bandwidth constraints, derives closed-form expressions for secure bandwidth thresholds, and provides tight upper bounds on both information leakage and adversarial advantage. The theoretical findings are validated through an extreme ultraviolet roughness spectrum case study. The paper also includes a fully reproducible protocol and open-source implementation to facilitate independent verification and extension.

Quantitative Information Flow (QIF) lacks a rigorous dynamic leakage quantification framework, as existing theories predominantly adopt static perspectives and fail to satisfy fundamental information-theoretic axioms—such as non-interference—over execution traces. Method: This paper introduces a novel dynamic leakage measure that decouples the attacker’s belief from the baseline secret distribution. Grounded in Bayesian inference and information-theoretic modeling, it formally captures temporal privacy attacks along program executions. Contribution/Results: The framework is the first to strictly satisfy non-interference and other core axioms on dynamic traces while remaining compatible with classical static QIF models. Theoretical analysis identifies precise boundaries under which monotonicity and the data processing inequality break down in dynamic settings. Empirical validation in privacy-preserving data publishing demonstrates both theoretical soundness and practical consistency. The approach provides a provably grounded, real-time quantifiable foundation for runtime privacy monitoring and adaptive privacy mechanisms.

Quantitative evaluation of microarchitectural side channels faces two key challenges: inherent system noise and behavioral uncertainty arising from probabilistic attacks and defenses, compounded by the inability of conventional abstract models to capture fine-grained microprocessor behavior. This paper introduces statistical model checking (SMC) to this domain for the first time, enabling probabilistic verification directly on real hardware or cycle-accurate simulators—thereby avoiding security vulnerabilities missed due to model abstraction. Our approach integrates probabilistic experimentation with formal verification, supporting statistically sound optimization of stochastic countermeasures such as noise injection. Through three case studies, we demonstrate SMC’s rigor and practicality in vulnerability confirmation, defense efficacy assessment, and noise-parameter tuning. The results provide statistically guaranteed, quantitative decision support for side-channel security analysis and mitigation.

This study investigates the robustness of artificial intelligence in two critical security tasks: network intrusion detection and identification of side-channel information leakage in cryptographic implementations. To address performance degradation under distribution shifts and unknown traffic scenarios, we systematically evaluate multiple machine learning approaches on the NSL-KDD and CIC-IDS datasets. Our results demonstrate that models achieve near-perfect detection accuracy in stable environments but suffer significant performance drops under distributional shifts. Furthermore, AI methods effectively identify feature patterns consistent with side-channel leakage, confirming their potential for security analysis of cryptographic implementations. This work provides an empirical foundation and methodological insights for enhancing the generalization capabilities of AI-driven security systems.

This study addresses the instability of side-channel leakage detection caused by variations in electromagnetic probe placement, which severely limits the transferability of cross-device attacks. To overcome this challenge, the authors propose a unified deep learning model trained on electromagnetic traces collected simultaneously from multiple probe positions, enabling, for the first time, effective capture of leakage information across a larger area of the target chip. This approach significantly enhances the robustness and transferability of side-channel attacks under varying probe locations and across different devices. The method’s stability and effectiveness in cross-environment attack scenarios are rigorously validated using datasets acquired independently in two distinct laboratories.

This work addresses the vulnerability of power side-channel–based IoT malware detection systems to adversarial attacks by proposing a novel evasion technique that injects structured no-operation (NOP) instructions during the scanning phase of Mirai botnet execution. This approach dynamically perturbs device power consumption signatures to effectively evade AI/ML-driven anomaly detection while preserving the core malicious functionality. To the best of our knowledge, this is the first use of structured NOPs for side-channel signal perturbation, exposing practical security limitations in current detection frameworks. Evaluation on a real-world dataset collected from smartphones across multiple vendors demonstrates an average attack success rate of 75.2% against several state-of-the-art power side-channel analysis models, confirming the method’s effectiveness and practicality in realistic deployment scenarios.

This work addresses the lack of a rigorous theoretical foundation for side-channel leakage in modern encrypted communication protocols such as TLS 1.3 and QUIC, particularly in traffic analysis scenarios relying solely on side-channel features. The authors propose a formal information-theoretic model Σ = (Γ, Ω) that captures the causal chain from application semantics to network observables, leveraging composite channel structures and Lipschitz-based statistical propagation to analyze semantic distinguishability. They introduce and prove the "Side-Channel Existence Theorem," establishing the information-theoretic inevitability of side-channel leakage: in efficiency-oriented systems, any pair of distinguishable application semantics necessarily induces observable leakage. This result provides a verifiable mathematical basis for predicting attack feasibility, quantitatively evaluating defenses, and formally reasoning about the trade-off between efficiency and privacy.

This work addresses a long-overlooked security vulnerability in 2.5D/3D chiplet-based integrated architectures: the risk of cross-chiplet physical side-channel attacks. We propose and formally define a novel threat model wherein an on-package communication-oriented chiplet—such as one incorporating an integrated antenna or RFID structure—acts as an internal observation platform to eavesdrop on neighboring victim chiplets via electromagnetic coupling. By integrating electromagnetic analysis, signal acquisition, and correlation modeling, we experimentally validate the feasibility of this attack vector in a real-world advanced packaging environment. Our results demonstrate that an adversary can effectively recover operational activity information from a victim chiplet through signals captured by the communication chiplet, thereby exposing a critical blind spot in current hardware security design practices.

This work addresses the challenges of limited scalability and insufficient attribution accuracy in identifying root causes of power side-channel leakage during pre-silicon processor design. The paper introduces SPARC, a novel framework that enables, for the first time, automated and highly accurate end-to-end leakage detection and root-cause tracing in the pre-silicon phase. SPARC achieves this by performing macrocell-level information flow tracking and employing enhanced shadow logic to tag key-dependent switching activity, which is then correlated with software instructions through statistical leakage testing. Evaluation on multiple open-source RISC-V processors demonstrates that SPARC not only reproduces known vulnerabilities but also uncovers previously unknown microarchitectural side channels, while achieving an 8× speedup in single-trace simulation compared to existing approaches.