Publications: Presented multiple papers at conferences such as MICRO, ICML 2025, PACT’24, SC’24; Projects: COGNATE (led by Chamika Sudusinghe), Taming the Acceleration Tax: Enabling New Opportunities for Fine-Grained, Disaggregated Accelerator-Level Parallelism, Distributed-Memory Parallel Algorithms for Sparse Matrix and Sparse Tall-and-Skinny Matrix Multiplication.
Research Experience
Worked on firmware development for Amazon’s Scout; PostgreSQL at Microsoft Azure; CPU verification at Intel; CPU microarchitecture at Apple; was heavily involved with the University of Texas Solar Vehicles Team and did bioelectronics research with UT Austin’s Lu Group during undergraduate years.
Education
PhD: University of Illinois Urbana-Champaign, Computer Science; Bachelor's: University of Texas at Austin, Electrical & Computer Engineering.
Background
Research Interests: Computer architecture and hardware/software systems development; Professional Field: Computer Science; Brief Introduction: PhD candidate in the Computer Science department at the University of Illinois Urbana-Champaign, previously studied Electrical & Computer Engineering at the University of Texas at Austin.