Bo Wang
Scholar

Bo Wang

Google Scholar ID: vvng77kAAAAJ
Assistant Professor, Singapore University of Technology and Design
Edge AI AccelerationEnergy-Efficient CircuitsNeuromorphic Computing
Citations & Impact
All-time
Citations
429
 
H-index
9
 
i10-index
9
 
Publications
20
 
Co-authors
0
 
Contact
No contact links provided.
Resume (English only)
Academic Achievements
  • Paper titled 'Coflex: Enhancing HW-NAS with Sparse Gaussian Processes for Efficient and Scalable DNN Accelerator Design' accepted for presentation at the 2025 IEEE International Conference on Computer-Aided Design (ICCAD 2025).
  • Paper titled 'RBFlex-NAS: Training-Free Neural Architecture Search Using Radial Basis Function Kernel and Hyperparameter Detection' accepted for publication in IEEE Transactions on Neural Networks and Learning Systems (TNNLS, Impact Factor 10.2).
  • Paper titled 'A 23.5 TOPS/W Depthwise Separable Convolution Accelerator for Event-Based Depth Estimation' accepted for presentation at the 2025 IEEE International Symposium on Circuits and Systems (ISCAS 2025).
  • Joint paper titled 'SESOMP: A Scalable and Energy-Efficient Self-Organizing Map Processor for IoT Devices' accepted for publication in the Journal of Solid State Circuits!
  • Awarded the prestigious Academic Research Fund (Tier 2) by the Singapore Ministry of Education.
  • Serves as a Technical Program Committee member for the 2026 IEEE International Solid-State Circuits Conference (ISSCC).
  • Serves as a Technical Program Committee member for the 2025 IEEE Asian Solid-State Circuits Conference (A-SSCC).
Research Experience
  • Head of the Edge AI Acceleration Lab at Singapore University of Technology and Design, focusing on accelerating edge AI applications in the domain of VLSI Circuits and Systems.
Background
  • Research interests include full-digital accelerators, neuromorphic processors, in-memory computing circuits and mapping, and design automation tools for hardware acceleration. Aiming to deliver application-specific, energy-efficient, and reliable accelerator platforms for intelligent IoT devices through a hardware-software co-design approach.
Miscellany
  • Invited to give talks on topics related to edge AI acceleration at National Yang Ming Chiao Tung University, Taiwan, 2024 IEEE Asian Pacific Conference on Circuits and Systems (APPCAS), Tsinghua University, Institute of Microelectronics of Chinese Academy of Sciences, and Huazhong University of Science and Technology, China.
Co-authors
0 total
Co-authors: 0 (list not available)