Received ACM SIGARCH and IEEE-CS TCCA Outstanding Dissertation Award Honorable Mention; two IEEE Micro Top Picks awards; IEEE Micro Honorable Mention Award and an Outstanding Graduate Student award; published papers in top conferences such as ISCA and ASPLOS.
Research Experience
During his Ph.D., designed a programmable accelerator for irregular workloads, called Sparse Processing Unit (SPU); proposed PolyGraph accelerators that implement the TaskFlow execution model; interned at Intel, Google, and Microsoft, gaining experience in performance characterization of various industrial architectures.
Education
Ph.D. in Computer Science from the University of California Los Angeles, advised by Prof. Tony Nowatzki; B.S. in Electronics and Communication Engineering with minors in Computer Science from Indian Institute of Technology Roorkee, worked with Prof. Onur Mutlu on memory scheduling techniques.
Background
A Systems Research Engineer at Google. Interested in designing novel accelerator architectures and interfaces to integrate them into the system-on-chip.
Miscellany
No personal interests or other information provided