Nikolaos Bellas
Scholar

Nikolaos Bellas

Google Scholar ID: vHo4xHoAAAAJ
Professor, Department of Electrical and Computer Engineering, University of Thessaly
Reconfigurable ComputingEmbedded SystemsCAD toolsComputer ArchitectureApproximate Computing
Citations & Impact
All-time
Citations
580
 
H-index
14
 
i10-index
21
 
Publications
20
 
Co-authors
0
 
Resume (English only)
Academic Achievements
  • Holds 10 issued US patents, including:
  • - Method and apparatus for transforming a non-linear lens-distorted image
  • - Method and Apparatus for Configuring Buffers for Streaming Data Transfer
  • - System and method for bad pixel replacement in image processing
  • - System and method for roll-off correction in image processing
  • - Streaming kernel selection for reconfigurable processor
  • - Automatic generation of streaming processor circuit
  • - Virtual Memory Translation Unit for Media Acceleration
  • - A programmable, high performance Vector array unit used for Real-time Motion Estimation
Research Experience
  • From 1999 to 2007, he was a principal member of Technical Staff at Motorola Labs in the US. He was one of the architects of Falcon, an MPEG4 video decoding chip used by the first Motorola camera phone, and has worked extensively on architecting systems on chip for multimedia and imaging applications.
Education
  • Received a diploma in Computer Engineering and Informatics from the University of Patras, Greece, in 1992; MSc and PhD degrees in Electrical and Computer Engineering from the University of Illinois at Urbana-Champaign, USA, in 1995 and 1998, respectively. His PhD dissertation was titled 'Architectural and Compiler Techniques for Energy Reduction in High-Performance Microprocessors,' under the supervision of Professors Ibrahim Hajj and Constantine Polychronopoulos. His MSc thesis was titled 'A Novel Design for Testability Approach using State-Space information,' supervised by Professor Daniel Saab.
Background
  • Professor with research interests in approximate computing, reconfigurable computing, low power design, and CAD tools for architectural synthesis.
Co-authors
0 total
Co-authors: 0 (list not available)