wenlei bao
Scholar

wenlei bao

Google Scholar ID: gEhkbrsAAAAJ
Apple
Compiler OptimizationHigh Performance ComputingPolyhedral CompilationAI System
Citations & Impact
All-time
Citations
216
 
H-index
9
 
i10-index
8
 
Publications
20
 
Co-authors
14
list available
Publications
20 items
Browse publications on Google Scholar (top-right) ↗
Resume (English only)
Academic Achievements
  • NGEMM: Optimizing GEMM for Deep Learning via Compiler-based Techniques; Accelerating Recurrent Neural Networks through Compiler Techniques and Quantization; Analytical Modeling of Cache Behavior for Affine Programs; Efficient Cache Simulation for Affine Computations; Static and Dynamic Frequency Scaling on Multicore CPUs; Effective padding of multidimensional arrays to avoid cache conflict misses; Polycheck: Dynamic verification of iteration space transformations on affine programs; PWCET: Power-Aware Worst Case Execution Time Analysis.
Research Experience
  • Aug. 2020 to Present: Apple; Jun. 2018 to Aug. 2020: Microsoft AI Framework, developing compiler-based, high-performance AI Inference Engine, Bellevue, WA; Jun. to Dec. 2017: Nvidia Internship, optimizing Convolution Neural Network (CNN) on GPU, Redmond, WA; May to Jul. 2015: Pacific Northwest National Laboratory (PNNL) Internship, program verification, Richland, WA; May to Aug. 2014: Pacific Northwest National Laboratory (PNNL) Internship, energy optimization, Richland, WA.
Education
  • Ph.D. from the Department of Computer Science and Engineering at The Ohio State University, advisor Prof. P. Sadayappan, and worked closely with Dr. Sriram Krishnamoorthy and Dr. Louis-Noël Pouchet.
Background
  • Research interests include High performance & Parallel Computing, Compiler Optimizations, Polyhedral Compilation. Currently working on AI Infrastructure.
Miscellany
  • Reviewer of ACM Transactions on Architecture and Code Optimization (TACO); Reviewer of Journal of Parallel and Distributed Computing (JPDC); Reviewer of ACM Transactions on Embedded Computing Systems (TECS); Reviewer of IEEE International Conference on High Performance Computing (HiPC'18).