Marian Verhelst
Scholar

Marian Verhelst

Google Scholar ID: fa9SE3MAAAAJ
Micas - ESAT - KU Leuven, Belgium
Low-energy chip designsensor fusionmachine learningcross-layer optimization
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Citations & Impact
All-time
Citations
6,146
 
H-index
38
 
i10-index
100
 
Publications
20
 
Co-authors
43
list available
Contact
No contact links provided.
Publications
23 items
TreeGRNG: Binary Tree Gaussian Random Number Generator for Efficient Probabilistic AI Hardware
2026
Cited
0
AIA: A 16nm Multicore SoC for Approximate Inference Acceleration Exploiting Non-normalized Knuth-Yao Sampling and Inter-Core Register Sharing
2026
Cited
0
AIA: A Customized Multi-core RISC-V SoC for Discrete Sampling Workloads in 16 nm
2026
Cited
0
Agent Memory: Characterization and System Implications of Stateful Long-Horizon Workloads
2026
Cited
0
Hardware Generation and Exploration of Lookup Table-Based Accelerators for 1.58-bit LLM Inference
2026
Cited
0
The Hyperscale Lottery: How State-Space Models Have Sacrificed Edge Efficiency
2026
Cited
0
MONET: Modeling and Optimization of neural NEtwork Training from Edge to Data Centers
2026
Cited
0
A 16 nm 1.60TOPS/W High Utilization DNN Accelerator with 3D Spatial Data Reuse and Efficient Shared Memory Access
2026
Cited
0
Resume (English only)
Co-authors
43 total
Co-author 1
Co-author 1
Wannes Meert
Wannes Meert
DTAI, KU Leuven
Co-author 3
Co-author 3
Sofie Pollin
Sofie Pollin
Professor Electrical Engineering, KU Leuven
Co-author 5
Co-author 5
Co-author 6
Co-author 6
Co-author 7
Co-author 7
Co-author 8
Co-author 8