Marian Verhelst
Scholar

Marian Verhelst

Google Scholar ID: fa9SE3MAAAAJ
Micas - ESAT - KU Leuven, Belgium
Low-energy chip designsensor fusionmachine learningcross-layer optimization
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Citations & Impact
All-time
Citations
6,146
 
H-index
38
 
i10-index
100
 
Publications
20
 
Co-authors
43
list available
Contact
No contact links provided.
Publications
27 items
A 25-$μ$s/inf Event-driven Graph Neural Network Processor with Spatiotemporal Caching and Spline Convolution for Ultra-low-latency AI at the Edge
2026
Cited
0
ETHEREAL: A 25.6-$μ$s/inf. Low-latency Event-driven Graph-neural-network Processor for High-resolution Vision at the Edge
2026
Cited
0
ARES: Adaptive Reasoning-Effort Steering for PPA- and Cost-Aware RTL Optimization with LLM Agents
2026
Cited
0
HiKV: Hierarchical Importance-Aware KV Cache with Hardware Acceleration for LLM Decoding
2026
Cited
0
TreeGRNG: Binary Tree Gaussian Random Number Generator for Efficient Probabilistic AI Hardware
2026
Cited
0
AIA: A 16nm Multicore SoC for Approximate Inference Acceleration Exploiting Non-normalized Knuth-Yao Sampling and Inter-Core Register Sharing
2026
Cited
0
AIA: A Customized Multi-core RISC-V SoC for Discrete Sampling Workloads in 16 nm
2026
Cited
0
Agent Memory: Characterization and System Implications of Stateful Long-Horizon Workloads
2026
Cited
0
Resume (English only)
Co-authors
43 total
Co-author 1
Co-author 1
Wannes Meert
Wannes Meert
DTAI, KU Leuven
Co-author 3
Co-author 3
Sofie Pollin
Sofie Pollin
Professor Electrical Engineering, KU Leuven
Co-author 5
Co-author 5
Co-author 6
Co-author 6
Co-author 7
Co-author 7
Co-author 8
Co-author 8