Vijay Ganesh
Scholar

Vijay Ganesh

Google Scholar ID: YP23eR0AAAAJ
Professor, Georgia Institute of Technology, Atlanta, GA, USA
SAT/SMT SolversAIsoftware engineeringmathematical logicquantum foundations
Citations & Impact
All-time
Citations
4,441
 
H-index
34
 
i10-index
94
 
Publications
20
 
Co-authors
96
list available
Resume (English only)
Academic Achievements
  • 2025: AAAI Tutorial on ML for Solvers
  • 2023: Joined Georgia Tech
  • 2022: Waterloo.AI Workshop on AI for Science
  • 2021–present: SAT Seminar; SAT Program at Simons Institute, Berkeley
  • 2020–2021: ML+Logic online seminar
  • 2020: Book chapter on SAT solvers released
  • 2019: ISSTA Keynote + Impact Award
  • 2018: Waterloo AI Institute featured project
  • 2017: Two Silver medals at SAT competition
  • 2016: ACM Test of Time Award; Best Paper Award at ACSAC; Two Gold medals at SAT; Early Researcher Award; Fields Institute Workshop; St. Petersburg Special Semester on Computational Complexity; Media coverage of research
  • 2015: IBM Faculty Award; CAV and CADE papers among best; Best paper award at SPLC; Released STP solver, MathCheck tool, Z3str2 string solver
  • 2014: IBM PL Day Speaker; Best Student Paper Award
  • 2013: Heidelberg Laureate Forum participant; Google Faculty Award
  • 2011: Google Faculty Award
Research Experience
  • Professor at Georgia Tech (2023–present)
  • Professor at University of Waterloo (2012–2023; Assistant Professor 2012–2018, Associate Professor 2018–2023)
  • Co-Director of Waterloo AI Institute (2021–2023)
  • Research Scientist at MIT (2007–2012)
  • Leads multiple research projects including:
  • — Machine Learning for Logic Solvers (e.g., MapleSAT, AlphaMapleSAT, Z3Alpha, Meta-solving, Z3str* string solvers, Parallel SAT for cryptanalysis)
  • — Logic for ML (e.g., Neurosymbolic AI for scientific discovery, math, and code)
  • — Proof complexity-theoretic analysis of SAT/SMT solvers and formal methods
  • — Software Engineering and Security (e.g., BanditFuzz, Pierce, blockchain security, attack resistance of defense mechanisms, STP bitvector and array solver)
Background
  • Professor of Computer Science at Georgia Institute of Technology
  • Associate Director of the IDEaS (AI for Science and Engineering) Institute
  • Co-founder and Steering Committee Member of the Center for Mathematical AI at the Fields Institute
  • AI Fellow at BSIA
  • Research focuses on the theory and practice of SAT/SMT solvers and their applications in software engineering, security, AI, mathematics, and physics