Xinchen Wan
Scholar

Xinchen Wan

Google Scholar ID: W7L-UwIAAAAJ
ByteDance
AI NetworkingDatacenter NetworkingMachine Learning SystemHardware Acceleration
Citations & Impact
All-time
Citations
373
 
H-index
8
 
i10-index
8
 
Publications
19
 
Co-authors
17
list available
Resume (English only)
Academic Achievements
  • Publications:
  • - Taurus accepted at CoNEXT 2025
  • - Hermod short paper accepted at SIGCOMM 2025
  • - MixNet accepted at SIGCOMM 2025
  • - Pallas accepted at ATC 2025
  • - Harmonia accepted at ASPLOS 2025
  • - A Generic and Efficient Communication Framework for Message-level In-Network Computing accepted at INFOCOM 2025
  • - Design and Operation of Shared Machine Learning Clusters on Campus accepted at ASPLOS 2025
  • - Achieving Fairness Generalizability for Learning-based Congestion Control with Jury accepted at EuroSys 2025
  • - Fast, Scalable, and Accurate Rate Limiter for RDMA NICs accepted at SIGCOMM 2024
  • - Astraea: Towards Fair and Efficient Learning-based Congestion Control accepted at EuroSys 2024
  • - Accelerating Neural Recommendation Training with Embedding Scheduling accepted at NSDI 2024
Research Experience
  • Working as a Network Engineer and Researcher at ByteDance, focusing on building next-generation AI networks.
Education
  • Received a Ph.D. in Computer Science and Engineering from the Hong Kong University of Science and Technology (HKUST) in 2025, supervised by Prof. Kai Chen; received a B.Eng in Computer Science from Huazhong University of Science and Technology (HUST) in 2018, supervised by Prof. Song Wu.
Background
  • Network Engineer and Researcher at ByteDance. Research interests include AI Network, Machine Learning System, Hardware Acceleration, and Datacenter Networking.
Miscellany
  • Office: 601 108th Ave NE, Bellevue, WA 98004