Scholar
Ashish Sirasao
Google Scholar ID: TyABVB8AAAAJ
AI@AMD
Compilers
Numerics
Circuits
Systems
AI
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Citations & Impact
All-time
Citations
1,711
H-index
17
i10-index
29
Publications
20
Co-authors
8
list available
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Publications
11 items
FastTPS: An Optimized Method for LLM Token Phase for AI accelerators
2026
Cited
0
MINCE: Shrinking LLM Evaluation Datasets via Few-Model Monte Carlo Calibration
2026
Cited
0
UltraQuant: 4-bit KV Caching for Context-Heavy Agents
2026
Cited
0
Recover-LoRA for Aggressive Quantization: Reclaiming Accuracy in 2-Bit Language Models via Low-Rank Adaptation with Knowledge Distillation on Synthetic Data
2026
Cited
0
Privatar: Scalable Privacy-preserving Multi-user VR via Secure Offloading
2026
Cited
0
SDFP: Speculative Decoding with FIT-Pruned Models for Training-Free and Plug-and-Play LLM Acceleration
2026
Cited
0
Dual LoRA: Enhancing LoRA with Magnitude and Direction Updates
2025
Cited
0
KV Pareto: Systems-Level Optimization of KV Cache and Model Compression for Long Context Inference
2025
Cited
0
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Resume (English only)
Co-authors
8 total
Co-author 1
Co-author 2
Michael Wu
AMD
Vijay Janapa Reddi
Harvard University
Tushar Krishna
Associate Professor, Georgia Tech
Taehee Jeong
San Jose State University
Co-author 7
Stephen Neuendorffer
Xilinx