BalanceGS: Algorithm-System Co-design for Efficient 3D Gaussian Splatting Training on GPU (ASP-DAC26)
SpAct-NDP: Efficient LLM Inference via Sparse Activation on NDP-GPU Heterogeneous Architecture (ASP-DAC26)
Accelerator for LLM-Enhanced GNN with Product Quantization and Unified Indexing (ASP-DAC25)
LLSM: LLM-enhanced Logic Synthesis Model with EDA-guided CoT Prompting, Hybrid Embedding and AIG-tailored Acceleration (ASP-DAC25)
SG-Filter: Enhancing Similar Text Retrieval via Hierarchical Summarized-Semantic Index and Adaptive Filtering (CIKM25)
Harnessing Conventional Video Processing Insights for Emerging 3D Video Generation Models: A Comprehensive Attention-aware Way (DAC25)
SoftmAP: Software-Hardware Co-design for Integer-Only Softmax on Associative Processors (DATE25)
DyLGNN: Efficient LM-GNN Fine-tuning with Dynamic Node Partitioning, Low-degree Sparsity, and Asynchronous Sub-batch (DATE25)
FlightVGM: Efficient Video Generation Model Inference with Online Sparsification and Hybrid Precision on FPGAs (FPGA25)
Research Experience
Worked as a chip design verification engineer at T-Head Semiconductor Co., Ltd (Damo Academy and the wholly-owned entity of Alibaba Group) from 2021 to 2023.
Education
Received the B.S. degree in electronic engineering from Beihang University in 2018, and the M.S. degree from Shanghai Jiao Tong University in 2021, currently a Ph.D. student under the supervision of Prof. Guohao Dai.
Background
His current research interests include software-hardware co-design for machine learning and efficient circuit design for edge-side AI applications like Embodied AI (EAI).
Miscellany
Contact information includes email (kimholee at sjtu dot edu dot cn) and homepage.