Paper 'FLAG: Finding Line Anomalies (in RTL code) with Generative AI' accepted by Transactions on Design Automation of Electronic Systems (May 2025)
Paper 'On Hardware Security Bug Code Fixes By Prompting Large Language Models' accepted by IEEE Transactions on Information Forensics and Security (Feb 2024)
Paper 'Verigen: A large language model for verilog code generation' accepted by ACM Transactions on Design Automation of Electronic Systems (Jan 2024)
Paper 'Benchmarking Large Language Models for Automated Verilog RTL Code Generation' nominated for Best Paper at DATE 2023 (Nov 2022)
Paper 'Don’t CWEAT It: Toward CWE Analysis Techniques in Early Stages of Hardware Design' presented at ICCAD 2022 (Oct 2022)
Paper 'Examining Zero-Shot Vulnerability Repair with Large Language Models' accepted to IEEE Symposium on Security and Privacy 2023 (Aug 2022)
Paper 'Asleep at the Keyboard? Assessing the Security of GitHub Copilot's Code Contributions' won Distinguished Paper Award at IEEE S&P 2022 (May 2022)
Member of NYU team that won Hack@DAC 2021 and Hack@DAC 2022 consecutively