Scholar
Yanqing Zhang
Google Scholar ID: CLbekz4AAAAJ
NVIDIA
Machine Learning for EDA
GPU Acceleration for EDA
VLSI Design
Variation Tolerant Design
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Citations
2,772
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30
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20
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4
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Publications
1 items
AUTOGATE: Automated Clock Gating via Toggling-Aware LLM-based RTL Rewriting
2026
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Resume (English only)
Co-authors
4 total
Brucek Khailany
Senior Director of VLSI Research, NVIDIA
Co-author 2
Co-author 3
Mark H. Ren
Nvidia