Scholar
Po-An Tsai
Google Scholar ID: C5YtXyMAAAAJ
Sr. Research Scientist, NVIDIA Research
Citations & Impact
Citations
919
H-index
17
i10-index
22
Publications
20
Co-authors
16
list available
Publications
Resume (English only)
Academic Achievements
- Published 'Abstracting Sparse DNN Acceleration via Structured Sparse Tensor Decomposition' at MLSys 2025
- Published 'Sparsepipe: Sparse Inter-operator Dataflow Architecture with Cross-Iteration Reuse' at MICRO-57 (2024)
- Published 'Mind the Gap: Attainable Data Movement and Operational Intensity Bounds for Tensor Algorithms' at ISCA-51 (2024), nominated for Best Paper Award
- Published 'Symphony: Orchestrating Sparse and Dense Tensors with Hierarchical Heterogeneous Processing' in ACM Transactions on Computer Systems (Dec 2023)
- Published two papers at MICRO-56 (2023): 'RM-STC: Row-Merge Dataflow Inspired GPU Sparse Tensor Core for Energy-Efficient Sparse Acceleration' and 'HighLight: Efficient and Flexible DNN Acceleration with Hierarchical Structured Sparsity'
- Published 'Accelerating Sparse Data Orchestration via Dynamic Reflexive Tiling' at ASPLOS-28 (2023)
- Published 'Demystifying Map Space Exploration for NPUs' at IISWC 2022
- Published 'Sparseloop: An Analytical Approach To Sparse Tensor Accelerator Modeling' at MICRO-55 (2022)
- Published 'SIMD^2: A Generalized Matrix Instruction Set for Accelerating Tensor Computation beyond GEMM' at ISCA'22 (2022)
