Scholar
Stéphane Ducasse
Google Scholar ID: 7fHNqtoAAAAJ
INRIA Research Director
Citations & Impact
Citations
3,237
H-index
26
i10-index
82
Publications
20
Co-authors
35
list available
Publications
Resume (English only)
Academic Achievements
- Google Scholar h-index: 61
- Laureate of 'Prix FIEEC Bpifrance de la Recherche appliquée 2023'
- ECOOP 2023 Test of Time Award for 'Traits: Composable Units of Behavior'
- Most Influential Paper Award at Vissoft 2013 for 'Performance Evolution Blueprint'
- Recipient of ERC-Generator grant under France’s 'Programmes d'Investissements d’Avenir' (only CS researcher awarded)
- Promoted to First-Class Directeur de Recherche in December 2012
- Received INRIA 'Prime d'excellence scientifique' in 2016
- Distinguished Visiting Fellowship Award from the Royal Academy of Engineering (2011)
- PhD theses of Michele Lanza (2003) and Alexandre Bergel (2006) won the Ernest Denert Foundation Award for Software Engineering
- Best Paper Award at VISSOFT'22 for 'A New Generation of Class Blueprint'
- Paper 'Interpreter-guided Differential JIT Compiler Unit Testing' accepted at PLDI'22
- Paper on 'rotten green tests' accepted at ICSE 2019
- 'Dynamic web development with Seaside' won ESUG Best Book Award 2010
- 'Learning Programming with Robots' received PCPlus Magazine Award (2005) and Bitwise Recommended Award (2006)
Research Experience
- Research Director at INRIA Lille since September 2007
- Leads the RMoD team
- Co-directed the Software Composition Group with O. Nierstrasz for 10 years
- President of the European Smalltalk User Group (ESUG)
- Co-founded Synectique, a company offering specialized software analysis tools
- Delivered Master Classes on Pharo for Inria Academy and Inria Chile
- Program Committee Chair of the International Conference on Software Reuse (ICSR)
Miscellany
- Pharo has approximately 10,000 users and is taught in 30–40 universities worldwide
- Pharo GitHub repository has ~250 forks, with 790 packages, 10,658 classes, and 143,420 methods
- Runs on 11 platforms and multiple 32/64-bit architectures (Intel/ARM)
- Maintained by ~18 regular and up to 100 occasional contributors
- Supported by an industrial Pharo Consortium
