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Resume (English only)
Academic Achievements
Published 'Spec2RTL-Agent: Automated Hardware Code Generation from Complex Specifications Using LLM Agent Systems' at IEEE International Conference on LLM-Aided Design, 2025
Co-authored 'ChipNeMo: Domain-Adapted LLMs for Chip Design', 2023
Published 'VerilogEval: Evaluating Large Language Models for Verilog Code Generation' at IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 2023
Co-authored 'A 9.7fJ/Conv.-Step Capacitive Sensor Readout Circuit with Incremental Zoomed Time Domain Quantization' at IEEE Custom Integrated Circuits Conference (CICC), 2023
Published 'An Adversarial Active Sampling-based Data Augmentation Framework for Manufacturable Chip Design' at Workshop on ML for Systems at NeurIPS, 2022
Co-authored 'Why are Graph Neural Networks Effective for EDA Problems?' at International Conference on Computer-Aided Design, 2022